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Revert "Loongarch: Support loongarch avec"
This reverts commit 760d7e7. This results in build failures and has other issues according to Tianyang. Reported-by: kernel test robot <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Cc: Tianyang Zhang <[email protected]> Closes: https://lore.kernel.org/oe-kbuild-all/[email protected]/
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+10
-517
lines changed

14 files changed

+10
-517
lines changed

‎arch/loongarch/Kconfig‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,6 @@ config LOONGARCH
8383
select GENERIC_ENTRY
8484
select GENERIC_GETTIMEOFDAY
8585
select GENERIC_IOREMAP if !ARCH_IOREMAP
86-
select GENERIC_IRQ_MATRIX_ALLOCATOR
8786
select GENERIC_IRQ_MULTI_HANDLER
8887
select GENERIC_IRQ_PROBE
8988
select GENERIC_IRQ_SHOW

‎arch/loongarch/include/asm/cpu-features.h‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,5 @@
6565
#define cpu_has_guestid cpu_opt(LOONGARCH_CPU_GUESTID)
6666
#define cpu_has_hypervisor cpu_opt(LOONGARCH_CPU_HYPERVISOR)
6767
#define cpu_has_ptw cpu_opt(LOONGARCH_CPU_PTW)
68-
#define cpu_has_avecint cpu_opt(LOONGARCH_CPU_AVECINT)
6968

7069
#endif /* __ASM_CPU_FEATURES_H */

‎arch/loongarch/include/asm/cpu.h‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,6 @@ enum cpu_type_enum {
9999
#define CPU_FEATURE_GUESTID 24 /* CPU has GuestID feature */
100100
#define CPU_FEATURE_HYPERVISOR 25 /* CPU has hypervisor (running in VM) */
101101
#define CPU_FEATURE_PTW 26 /* CPU has hardware page table walker */
102-
#define CPU_FEATURE_AVECINT 27 /* CPU has avec interrupt */
103102

104103
#define LOONGARCH_CPU_CPUCFG BIT_ULL(CPU_FEATURE_CPUCFG)
105104
#define LOONGARCH_CPU_LAM BIT_ULL(CPU_FEATURE_LAM)
@@ -128,6 +127,5 @@ enum cpu_type_enum {
128127
#define LOONGARCH_CPU_GUESTID BIT_ULL(CPU_FEATURE_GUESTID)
129128
#define LOONGARCH_CPU_HYPERVISOR BIT_ULL(CPU_FEATURE_HYPERVISOR)
130129
#define LOONGARCH_CPU_PTW BIT_ULL(CPU_FEATURE_PTW)
131-
#define LOONGARCH_CPU_AVECINT BIT_ULL(CPU_FEATURE_AVECINT)
132130

133131
#endif /* _ASM_CPU_H */

‎arch/loongarch/include/asm/hw_irq.h‎

Lines changed: 0 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -9,16 +9,6 @@
99

1010
extern atomic_t irq_err_count;
1111

12-
/*
13-
* 256 vectors Map:
14-
*
15-
* 0 - 15: mapping legacy IPs, e.g. IP0-12.
16-
* 16 - 255: mapping a vector for external IRQ.
17-
*
18-
*/
19-
#define NR_VECTORS 256
20-
#define IRQ_MATRIX_BITS NR_VECTORS
21-
#define NR_LEGACY_VECTORS 16
2212
/*
2313
* interrupt-retrigger: NOP for now. This may not be appropriate for all
2414
* machines, we'll see ...

‎arch/loongarch/include/asm/irq.h‎

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ extern struct acpi_vector_group msi_group[MAX_IO_PICS];
6565
#define LOONGSON_LPC_LAST_IRQ (LOONGSON_LPC_IRQ_BASE + 15)
6666

6767
#define LOONGSON_CPU_IRQ_BASE 16
68-
#define LOONGSON_CPU_LAST_IRQ (LOONGSON_CPU_IRQ_BASE + 15)
68+
#define LOONGSON_CPU_LAST_IRQ (LOONGSON_CPU_IRQ_BASE + 14)
6969

7070
#define LOONGSON_PCH_IRQ_BASE 64
7171
#define LOONGSON_PCH_ACPI_IRQ (LOONGSON_PCH_IRQ_BASE + 47)
@@ -101,16 +101,6 @@ int pch_msi_acpi_init(struct irq_domain *parent,
101101
struct acpi_madt_msi_pic *acpi_pchmsi);
102102
int pch_pic_acpi_init(struct irq_domain *parent,
103103
struct acpi_madt_bio_pic *acpi_pchpic);
104-
105-
#ifdef CONFIG_ACPI
106-
int __init pch_msi_acpi_init_v2(struct irq_domain *parent,
107-
struct acpi_madt_msi_pic *pch_msi_entry);
108-
int __init loongarch_avec_acpi_init(struct irq_domain *parent);
109-
void complete_irq_moving(void);
110-
void loongarch_avec_offline_cpu(unsigned int cpu);
111-
void loongarch_avec_online_cpu(unsigned int cpu);
112-
#endif
113-
114104
int find_pch_pic(u32 gsi);
115105
struct fwnode_handle *get_pch_msi_handle(int pci_segment);
116106

‎arch/loongarch/include/asm/loongarch.h‎

Lines changed: 5 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,7 @@
7272
#define CPUCFG1_RPLV BIT(23)
7373
#define CPUCFG1_HUGEPG BIT(24)
7474
#define CPUCFG1_CRC32 BIT(25)
75+
#define CPUCFG1_MSGINT BIT(26)
7576

7677
#define LOONGARCH_CPUCFG2 0x2
7778
#define CPUCFG2_FP BIT(0)
@@ -251,8 +252,8 @@
251252
#define CSR_ESTAT_EXC_WIDTH 6
252253
#define CSR_ESTAT_EXC (_ULCAST_(0x3f) << CSR_ESTAT_EXC_SHIFT)
253254
#define CSR_ESTAT_IS_SHIFT 0
254-
#define CSR_ESTAT_IS_WIDTH 15
255-
#define CSR_ESTAT_IS (_ULCAST_(0x7fff) << CSR_ESTAT_IS_SHIFT)
255+
#define CSR_ESTAT_IS_WIDTH 14
256+
#define CSR_ESTAT_IS (_ULCAST_(0x3fff) << CSR_ESTAT_IS_SHIFT)
256257

257258
#define LOONGARCH_CSR_ERA 0x6 /* ERA */
258259

@@ -998,18 +999,10 @@
998999
#define CSR_FWPC_SKIP_SHIFT 16
9991000
#define CSR_FWPC_SKIP (_ULCAST_(1) << CSR_FWPC_SKIP_SHIFT)
10001001

1001-
#define LOONGARCH_CSR_IRR0 0xa0
1002-
#define LOONGARCH_CSR_IRR1 0xa1
1003-
#define LOONGARCH_CSR_IRR2 0xa2
1004-
#define LOONGARCH_CSR_IRR3 0xa3
1005-
#define LOONGARCH_CSR_IRR_BASE LOONGARCH_CSR_IRR0
1006-
1007-
#define LOONGARCH_CSR_ILR 0xa4
1008-
10091002
/*
10101003
* CSR_ECFG IM
10111004
*/
1012-
#define ECFG0_IM 0x00005fff
1005+
#define ECFG0_IM 0x00001fff
10131006
#define ECFGB_SIP0 0
10141007
#define ECFGF_SIP0 (_ULCAST_(1) << ECFGB_SIP0)
10151008
#define ECFGB_SIP1 1
@@ -1052,7 +1045,6 @@
10521045
#define IOCSRF_EIODECODE BIT_ULL(9)
10531046
#define IOCSRF_FLATMODE BIT_ULL(10)
10541047
#define IOCSRF_VM BIT_ULL(11)
1055-
#define IOCSRF_AVEC BIT_ULL(15)
10561048

10571049
#define LOONGARCH_IOCSR_VENDOR 0x10
10581050

@@ -1063,7 +1055,6 @@
10631055
#define LOONGARCH_IOCSR_MISC_FUNC 0x420
10641056
#define IOCSR_MISC_FUNC_TIMER_RESET BIT_ULL(21)
10651057
#define IOCSR_MISC_FUNC_EXT_IOI_EN BIT_ULL(48)
1066-
#define IOCSR_MISC_FUNC_AVEC_EN BIT_ULL(51)
10671058

10681059
#define LOONGARCH_IOCSR_CPUTEMP 0x428
10691060

@@ -1384,10 +1375,9 @@ __BUILD_CSR_OP(tlbidx)
13841375
#define INT_TI 11 /* Timer */
13851376
#define INT_IPI 12
13861377
#define INT_NMI 13
1387-
#define INT_AVEC 14
13881378

13891379
/* ExcCodes corresponding to interrupts */
1390-
#define EXCCODE_INT_NUM (INT_AVEC + 1)
1380+
#define EXCCODE_INT_NUM (INT_NMI + 1)
13911381
#define EXCCODE_INT_START 64
13921382
#define EXCCODE_INT_END (EXCCODE_INT_START + EXCCODE_INT_NUM - 1)
13931383

‎arch/loongarch/include/asm/smp.h‎

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -69,11 +69,9 @@ extern int __cpu_logical_map[NR_CPUS];
6969
#define ACTION_BOOT_CPU 0
7070
#define ACTION_RESCHEDULE 1
7171
#define ACTION_CALL_FUNCTION 2
72-
#define ACTION_CLEAR_VECT 3
7372
#define SMP_BOOT_CPU BIT(ACTION_BOOT_CPU)
7473
#define SMP_RESCHEDULE BIT(ACTION_RESCHEDULE)
7574
#define SMP_CALL_FUNCTION BIT(ACTION_CALL_FUNCTION)
76-
#define SMP_CLEAR_VECT BIT(ACTION_CLEAR_VECT)
7775

7876
struct secondary_data {
7977
unsigned long stack;

‎arch/loongarch/kernel/cpu-probe.c‎

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,7 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
106106
elf_hwcap |= HWCAP_LOONGARCH_CRC32;
107107
}
108108

109+
109110
config = read_cpucfg(LOONGARCH_CPUCFG2);
110111
if (config & CPUCFG2_LAM) {
111112
c->options |= LOONGARCH_CPU_LAM;
@@ -175,8 +176,6 @@ static void cpu_probe_common(struct cpuinfo_loongarch *c)
175176
c->options |= LOONGARCH_CPU_EIODECODE;
176177
if (config & IOCSRF_VM)
177178
c->options |= LOONGARCH_CPU_HYPERVISOR;
178-
if (config & IOCSRF_AVEC)
179-
c->options |= LOONGARCH_CPU_AVECINT;
180179

181180
config = csr_read32(LOONGARCH_CSR_ASID);
182181
config = (config & CSR_ASID_BIT) >> CSR_ASID_BIT_SHIFT;

‎arch/loongarch/kernel/smp.c‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -234,9 +234,6 @@ static irqreturn_t loongson_ipi_interrupt(int irq, void *dev)
234234
per_cpu(irq_stat, cpu).ipi_irqs[IPI_CALL_FUNCTION]++;
235235
}
236236

237-
if (action & SMP_CLEAR_VECT)
238-
complete_irq_moving();
239-
240237
return IRQ_HANDLED;
241238
}
242239

@@ -391,7 +388,6 @@ int loongson_cpu_disable(void)
391388
irq_migrate_all_off_this_cpu();
392389
clear_csr_ecfg(ECFG0_IM);
393390
local_irq_restore(flags);
394-
loongarch_avec_offline_cpu(cpu);
395391
local_flush_tlb_all();
396392

397393
return 0;
@@ -570,7 +566,6 @@ asmlinkage void start_secondary(void)
570566
* early is dangerous.
571567
*/
572568
WARN_ON_ONCE(!irqs_disabled());
573-
loongarch_avec_online_cpu(cpu);
574569
loongson_smp_finish();
575570

576571
cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);

‎drivers/irqchip/Makefile‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@ obj-$(CONFIG_LS1X_IRQ) += irq-ls1x.o
110110
obj-$(CONFIG_TI_SCI_INTR_IRQCHIP) += irq-ti-sci-intr.o
111111
obj-$(CONFIG_TI_SCI_INTA_IRQCHIP) += irq-ti-sci-inta.o
112112
obj-$(CONFIG_TI_PRUSS_INTC) += irq-pruss-intc.o
113-
obj-$(CONFIG_IRQ_LOONGARCH_CPU) += irq-loongarch-cpu.o irq-loongarch-avec.o
113+
obj-$(CONFIG_IRQ_LOONGARCH_CPU) += irq-loongarch-cpu.o
114114
obj-$(CONFIG_LOONGSON_LIOINTC) += irq-loongson-liointc.o
115115
obj-$(CONFIG_LOONGSON_EIOINTC) += irq-loongson-eiointc.o
116116
obj-$(CONFIG_LOONGSON_HTPIC) += irq-loongson-htpic.o

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