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Merge tag 'at91-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes
AT91 fixes for 6.0 It contains: - fixes for self-refresh on SAMA7G5 while in AT91 power management modes: one disabling a DDR PHY controller DLL which has been proved to be buggy and can introduce glitches that can cause unexpected behavior; one fixing the DDR PHY recalibration which cannot work for all possible cases (due to hardware bug) while using backup and self-refresh AT91 power management mode; - one defconfig fix to remove CONFIG_MICROCHIP_PIT64B from all AT91 defconfigs; - multiple device tree fixes for regulators to avoid having some of them enabled all the time and to describe min and max output ranges according to board capabilities. * tag 'at91-fixes-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: dts: at91: sama5d2_icp: don't keep vdd_other enabled all the time ARM: dts: at91: sama5d27_wlsom1: don't keep ldo2 enabled all the time ARM: dts: at91: sama7g5ek: specify proper regulator output ranges ARM: dts: at91: sama5d2_icp: specify proper regulator output ranges ARM: dts: at91: sama5d27_wlsom1: specify proper regulator output ranges ARM: at91: pm: fix DDR recalibration when resuming from backup and self-refresh ARM: at91: pm: fix self-refresh for sama7g5 ARM: configs: at91: remove CONFIG_MICROCHIP_PIT64B Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Arnd Bergmann <[email protected]>
2 parents 9a47261 + 3d074b7 commit 194bebf

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‎arch/arm/boot/dts/at91-sama5d27_wlsom1.dtsi

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -76,8 +76,8 @@
7676
regulators {
7777
vdd_3v3: VDD_IO {
7878
regulator-name = "VDD_IO";
79-
regulator-min-microvolt = <1200000>;
80-
regulator-max-microvolt = <3700000>;
79+
regulator-min-microvolt = <3300000>;
80+
regulator-max-microvolt = <3300000>;
8181
regulator-initial-mode = <2>;
8282
regulator-allowed-modes = <2>, <4>;
8383
regulator-always-on;
@@ -95,8 +95,8 @@
9595

9696
vddio_ddr: VDD_DDR {
9797
regulator-name = "VDD_DDR";
98-
regulator-min-microvolt = <600000>;
99-
regulator-max-microvolt = <1850000>;
98+
regulator-min-microvolt = <1200000>;
99+
regulator-max-microvolt = <1200000>;
100100
regulator-initial-mode = <2>;
101101
regulator-allowed-modes = <2>, <4>;
102102
regulator-always-on;
@@ -118,8 +118,8 @@
118118

119119
vdd_core: VDD_CORE {
120120
regulator-name = "VDD_CORE";
121-
regulator-min-microvolt = <600000>;
122-
regulator-max-microvolt = <1850000>;
121+
regulator-min-microvolt = <1250000>;
122+
regulator-max-microvolt = <1250000>;
123123
regulator-initial-mode = <2>;
124124
regulator-allowed-modes = <2>, <4>;
125125
regulator-always-on;
@@ -160,8 +160,8 @@
160160

161161
LDO1 {
162162
regulator-name = "LDO1";
163-
regulator-min-microvolt = <1200000>;
164-
regulator-max-microvolt = <3700000>;
163+
regulator-min-microvolt = <3300000>;
164+
regulator-max-microvolt = <3300000>;
165165
regulator-always-on;
166166

167167
regulator-state-standby {
@@ -175,9 +175,8 @@
175175

176176
LDO2 {
177177
regulator-name = "LDO2";
178-
regulator-min-microvolt = <1200000>;
179-
regulator-max-microvolt = <3700000>;
180-
regulator-always-on;
178+
regulator-min-microvolt = <1800000>;
179+
regulator-max-microvolt = <3300000>;
181180

182181
regulator-state-standby {
183182
regulator-on-in-suspend;

‎arch/arm/boot/dts/at91-sama5d2_icp.dts

Lines changed: 10 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -196,8 +196,8 @@
196196
regulators {
197197
vdd_io_reg: VDD_IO {
198198
regulator-name = "VDD_IO";
199-
regulator-min-microvolt = <1200000>;
200-
regulator-max-microvolt = <3700000>;
199+
regulator-min-microvolt = <3300000>;
200+
regulator-max-microvolt = <3300000>;
201201
regulator-initial-mode = <2>;
202202
regulator-allowed-modes = <2>, <4>;
203203
regulator-always-on;
@@ -215,8 +215,8 @@
215215

216216
VDD_DDR {
217217
regulator-name = "VDD_DDR";
218-
regulator-min-microvolt = <600000>;
219-
regulator-max-microvolt = <1850000>;
218+
regulator-min-microvolt = <1350000>;
219+
regulator-max-microvolt = <1350000>;
220220
regulator-initial-mode = <2>;
221221
regulator-allowed-modes = <2>, <4>;
222222
regulator-always-on;
@@ -234,8 +234,8 @@
234234

235235
VDD_CORE {
236236
regulator-name = "VDD_CORE";
237-
regulator-min-microvolt = <600000>;
238-
regulator-max-microvolt = <1850000>;
237+
regulator-min-microvolt = <1250000>;
238+
regulator-max-microvolt = <1250000>;
239239
regulator-initial-mode = <2>;
240240
regulator-allowed-modes = <2>, <4>;
241241
regulator-always-on;
@@ -257,7 +257,6 @@
257257
regulator-max-microvolt = <1850000>;
258258
regulator-initial-mode = <2>;
259259
regulator-allowed-modes = <2>, <4>;
260-
regulator-always-on;
261260

262261
regulator-state-standby {
263262
regulator-on-in-suspend;
@@ -272,8 +271,8 @@
272271

273272
LDO1 {
274273
regulator-name = "LDO1";
275-
regulator-min-microvolt = <1200000>;
276-
regulator-max-microvolt = <3700000>;
274+
regulator-min-microvolt = <2500000>;
275+
regulator-max-microvolt = <2500000>;
277276
regulator-always-on;
278277

279278
regulator-state-standby {
@@ -287,8 +286,8 @@
287286

288287
LDO2 {
289288
regulator-name = "LDO2";
290-
regulator-min-microvolt = <1200000>;
291-
regulator-max-microvolt = <3700000>;
289+
regulator-min-microvolt = <3300000>;
290+
regulator-max-microvolt = <3300000>;
292291
regulator-always-on;
293292

294293
regulator-state-standby {

‎arch/arm/boot/dts/at91-sama7g5ek.dts

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -244,8 +244,8 @@
244244
regulators {
245245
vdd_3v3: VDD_IO {
246246
regulator-name = "VDD_IO";
247-
regulator-min-microvolt = <1200000>;
248-
regulator-max-microvolt = <3700000>;
247+
regulator-min-microvolt = <3300000>;
248+
regulator-max-microvolt = <3300000>;
249249
regulator-initial-mode = <2>;
250250
regulator-allowed-modes = <2>, <4>;
251251
regulator-always-on;
@@ -264,8 +264,8 @@
264264

265265
vddioddr: VDD_DDR {
266266
regulator-name = "VDD_DDR";
267-
regulator-min-microvolt = <1300000>;
268-
regulator-max-microvolt = <1450000>;
267+
regulator-min-microvolt = <1350000>;
268+
regulator-max-microvolt = <1350000>;
269269
regulator-initial-mode = <2>;
270270
regulator-allowed-modes = <2>, <4>;
271271
regulator-always-on;
@@ -285,8 +285,8 @@
285285

286286
vddcore: VDD_CORE {
287287
regulator-name = "VDD_CORE";
288-
regulator-min-microvolt = <1100000>;
289-
regulator-max-microvolt = <1850000>;
288+
regulator-min-microvolt = <1150000>;
289+
regulator-max-microvolt = <1150000>;
290290
regulator-initial-mode = <2>;
291291
regulator-allowed-modes = <2>, <4>;
292292
regulator-always-on;
@@ -306,7 +306,7 @@
306306
vddcpu: VDD_OTHER {
307307
regulator-name = "VDD_OTHER";
308308
regulator-min-microvolt = <1050000>;
309-
regulator-max-microvolt = <1850000>;
309+
regulator-max-microvolt = <1250000>;
310310
regulator-initial-mode = <2>;
311311
regulator-allowed-modes = <2>, <4>;
312312
regulator-ramp-delay = <3125>;
@@ -326,8 +326,8 @@
326326

327327
vldo1: LDO1 {
328328
regulator-name = "LDO1";
329-
regulator-min-microvolt = <1200000>;
330-
regulator-max-microvolt = <3700000>;
329+
regulator-min-microvolt = <1800000>;
330+
regulator-max-microvolt = <1800000>;
331331
regulator-always-on;
332332

333333
regulator-state-standby {

‎arch/arm/configs/at91_dt_defconfig

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -196,7 +196,6 @@ CONFIG_RTC_DRV_AT91SAM9=y
196196
CONFIG_DMADEVICES=y
197197
CONFIG_AT_HDMAC=y
198198
CONFIG_AT_XDMAC=y
199-
CONFIG_MICROCHIP_PIT64B=y
200199
# CONFIG_IOMMU_SUPPORT is not set
201200
CONFIG_IIO=y
202201
CONFIG_AT91_ADC=y

‎arch/arm/configs/sama7_defconfig

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -188,7 +188,6 @@ CONFIG_RTC_DRV_AT91SAM9=y
188188
CONFIG_DMADEVICES=y
189189
CONFIG_AT_XDMAC=y
190190
CONFIG_STAGING=y
191-
CONFIG_MICROCHIP_PIT64B=y
192191
# CONFIG_IOMMU_SUPPORT is not set
193192
CONFIG_IIO=y
194193
CONFIG_IIO_SW_TRIGGER=y

‎arch/arm/mach-at91/pm.c

Lines changed: 32 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -541,9 +541,41 @@ extern u32 at91_pm_suspend_in_sram_sz;
541541

542542
static int at91_suspend_finish(unsigned long val)
543543
{
544+
unsigned char modified_gray_code[] = {
545+
0x00, 0x01, 0x02, 0x03, 0x06, 0x07, 0x04, 0x05, 0x0c, 0x0d,
546+
0x0e, 0x0f, 0x0a, 0x0b, 0x08, 0x09, 0x18, 0x19, 0x1a, 0x1b,
547+
0x1e, 0x1f, 0x1c, 0x1d, 0x14, 0x15, 0x16, 0x17, 0x12, 0x13,
548+
0x10, 0x11,
549+
};
550+
unsigned int tmp, index;
544551
int i;
545552

546553
if (soc_pm.data.mode == AT91_PM_BACKUP && soc_pm.data.ramc_phy) {
554+
/*
555+
* Bootloader will perform DDR recalibration and will try to
556+
* restore the ZQ0SR0 with the value saved here. But the
557+
* calibration is buggy and restoring some values from ZQ0SR0
558+
* is forbidden and risky thus we need to provide processed
559+
* values for these (modified gray code values).
560+
*/
561+
tmp = readl(soc_pm.data.ramc_phy + DDR3PHY_ZQ0SR0);
562+
563+
/* Store pull-down output impedance select. */
564+
index = (tmp >> DDR3PHY_ZQ0SR0_PDO_OFF) & 0x1f;
565+
soc_pm.bu->ddr_phy_calibration[0] = modified_gray_code[index];
566+
567+
/* Store pull-up output impedance select. */
568+
index = (tmp >> DDR3PHY_ZQ0SR0_PUO_OFF) & 0x1f;
569+
soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index];
570+
571+
/* Store pull-down on-die termination impedance select. */
572+
index = (tmp >> DDR3PHY_ZQ0SR0_PDODT_OFF) & 0x1f;
573+
soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index];
574+
575+
/* Store pull-up on-die termination impedance select. */
576+
index = (tmp >> DDR3PHY_ZQ0SRO_PUODT_OFF) & 0x1f;
577+
soc_pm.bu->ddr_phy_calibration[0] |= modified_gray_code[index];
578+
547579
/*
548580
* The 1st 8 words of memory might get corrupted in the process
549581
* of DDR PHY recalibration; it is saved here in securam and it
@@ -1066,10 +1098,6 @@ static int __init at91_pm_backup_init(void)
10661098
of_scan_flat_dt(at91_pm_backup_scan_memcs, &located);
10671099
if (!located)
10681100
goto securam_fail;
1069-
1070-
/* DDR3PHY_ZQ0SR0 */
1071-
soc_pm.bu->ddr_phy_calibration[0] = readl(soc_pm.data.ramc_phy +
1072-
0x188);
10731101
}
10741102

10751103
return 0;

‎arch/arm/mach-at91/pm_suspend.S

Lines changed: 17 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -172,9 +172,15 @@ sr_ena_2:
172172
/* Put DDR PHY's DLL in bypass mode for non-backup modes. */
173173
cmp r7, #AT91_PM_BACKUP
174174
beq sr_ena_3
175-
ldr tmp1, [r3, #DDR3PHY_PIR]
176-
orr tmp1, tmp1, #DDR3PHY_PIR_DLLBYP
177-
str tmp1, [r3, #DDR3PHY_PIR]
175+
176+
/* Disable DX DLLs. */
177+
ldr tmp1, [r3, #DDR3PHY_DX0DLLCR]
178+
orr tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
179+
str tmp1, [r3, #DDR3PHY_DX0DLLCR]
180+
181+
ldr tmp1, [r3, #DDR3PHY_DX1DLLCR]
182+
orr tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
183+
str tmp1, [r3, #DDR3PHY_DX1DLLCR]
178184

179185
sr_ena_3:
180186
/* Power down DDR PHY data receivers. */
@@ -221,10 +227,14 @@ sr_ena_3:
221227
bic tmp1, tmp1, #DDR3PHY_DSGCR_ODTPDD_ODT0
222228
str tmp1, [r3, #DDR3PHY_DSGCR]
223229

224-
/* Take DDR PHY's DLL out of bypass mode. */
225-
ldr tmp1, [r3, #DDR3PHY_PIR]
226-
bic tmp1, tmp1, #DDR3PHY_PIR_DLLBYP
227-
str tmp1, [r3, #DDR3PHY_PIR]
230+
/* Enable DX DLLs. */
231+
ldr tmp1, [r3, #DDR3PHY_DX0DLLCR]
232+
bic tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
233+
str tmp1, [r3, #DDR3PHY_DX0DLLCR]
234+
235+
ldr tmp1, [r3, #DDR3PHY_DX1DLLCR]
236+
bic tmp1, tmp1, #DDR3PHY_DXDLLCR_DLLDIS
237+
str tmp1, [r3, #DDR3PHY_DX1DLLCR]
228238

229239
/* Enable quasi-dynamic programming. */
230240
mov tmp1, #0

‎include/soc/at91/sama7-ddr.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,14 @@
3838
#define DDR3PHY_DSGCR_ODTPDD_ODT0 (1 << 20) /* ODT[0] Power Down Driver */
3939

4040
#define DDR3PHY_ZQ0SR0 (0x188) /* ZQ status register 0 */
41+
#define DDR3PHY_ZQ0SR0_PDO_OFF (0) /* Pull-down output impedance select offset */
42+
#define DDR3PHY_ZQ0SR0_PUO_OFF (5) /* Pull-up output impedance select offset */
43+
#define DDR3PHY_ZQ0SR0_PDODT_OFF (10) /* Pull-down on-die termination impedance select offset */
44+
#define DDR3PHY_ZQ0SRO_PUODT_OFF (15) /* Pull-up on-die termination impedance select offset */
45+
46+
#define DDR3PHY_DX0DLLCR (0x1CC) /* DDR3PHY DATX8 DLL Control Register */
47+
#define DDR3PHY_DX1DLLCR (0x20C) /* DDR3PHY DATX8 DLL Control Register */
48+
#define DDR3PHY_DXDLLCR_DLLDIS (1 << 31) /* DLL Disable */
4149

4250
/* UDDRC */
4351
#define UDDRC_STAT (0x04) /* UDDRC Operating Mode Status Register */

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