|
799 | 799 | compatible = "qcom,msm8996-bimc";
|
800 | 800 | reg = <0x00408000 0x5a000>;
|
801 | 801 | #interconnect-cells = <1>;
|
802 |
| - clock-names = "bus", "bus_a"; |
803 |
| - clocks = <&rpmcc RPM_SMD_BIMC_CLK>, |
804 |
| - <&rpmcc RPM_SMD_BIMC_A_CLK>; |
805 | 802 | };
|
806 | 803 |
|
807 | 804 | tsens0: thermal-sensor@4a9000 {
|
|
852 | 849 | compatible = "qcom,msm8996-cnoc";
|
853 | 850 | reg = <0x00500000 0x1000>;
|
854 | 851 | #interconnect-cells = <1>;
|
855 |
| - clock-names = "bus", "bus_a"; |
856 |
| - clocks = <&rpmcc RPM_SMD_CNOC_CLK>, |
857 |
| - <&rpmcc RPM_SMD_CNOC_A_CLK>; |
858 | 852 | };
|
859 | 853 |
|
860 | 854 | snoc: interconnect@524000 {
|
861 | 855 | compatible = "qcom,msm8996-snoc";
|
862 | 856 | reg = <0x00524000 0x1c000>;
|
863 | 857 | #interconnect-cells = <1>;
|
864 |
| - clock-names = "bus", "bus_a"; |
865 |
| - clocks = <&rpmcc RPM_SMD_SNOC_CLK>, |
866 |
| - <&rpmcc RPM_SMD_SNOC_A_CLK>; |
867 | 858 | };
|
868 | 859 |
|
869 | 860 | a0noc: interconnect@543000 {
|
|
883 | 874 | compatible = "qcom,msm8996-a1noc";
|
884 | 875 | reg = <0x00562000 0x5000>;
|
885 | 876 | #interconnect-cells = <1>;
|
886 |
| - clock-names = "bus", "bus_a"; |
887 |
| - clocks = <&rpmcc RPM_SMD_AGGR1_NOC_CLK>, |
888 |
| - <&rpmcc RPM_SMD_AGGR1_NOC_A_CLK>; |
889 | 877 | };
|
890 | 878 |
|
891 | 879 | a2noc: interconnect@583000 {
|
892 | 880 | compatible = "qcom,msm8996-a2noc";
|
893 | 881 | reg = <0x00583000 0x7000>;
|
894 | 882 | #interconnect-cells = <1>;
|
895 |
| - clock-names = "bus", "bus_a", "aggre2_ufs_axi", "ufs_axi"; |
896 |
| - clocks = <&rpmcc RPM_SMD_AGGR2_NOC_CLK>, |
897 |
| - <&rpmcc RPM_SMD_AGGR2_NOC_A_CLK>, |
898 |
| - <&gcc GCC_AGGRE2_UFS_AXI_CLK>, |
| 883 | + clock-names = "aggre2_ufs_axi", "ufs_axi"; |
| 884 | + clocks = <&gcc GCC_AGGRE2_UFS_AXI_CLK>, |
899 | 885 | <&gcc GCC_UFS_AXI_CLK>;
|
900 | 886 | };
|
901 | 887 |
|
902 | 888 | mnoc: interconnect@5a4000 {
|
903 | 889 | compatible = "qcom,msm8996-mnoc";
|
904 | 890 | reg = <0x005a4000 0x1c000>;
|
905 | 891 | #interconnect-cells = <1>;
|
906 |
| - clock-names = "bus", "bus_a", "iface"; |
907 |
| - clocks = <&rpmcc RPM_SMD_MMAXI_CLK>, |
908 |
| - <&rpmcc RPM_SMD_MMAXI_A_CLK>, |
909 |
| - <&mmcc AHB_CLK_SRC>; |
| 892 | + clock-names = "iface"; |
| 893 | + clocks = <&mmcc AHB_CLK_SRC>; |
910 | 894 | };
|
911 | 895 |
|
912 | 896 | pnoc: interconnect@5c0000 {
|
913 | 897 | compatible = "qcom,msm8996-pnoc";
|
914 | 898 | reg = <0x005c0000 0x3000>;
|
915 | 899 | #interconnect-cells = <1>;
|
916 |
| - clock-names = "bus", "bus_a"; |
917 |
| - clocks = <&rpmcc RPM_SMD_PCNOC_CLK>, |
918 |
| - <&rpmcc RPM_SMD_PCNOC_A_CLK>; |
919 | 900 | };
|
920 | 901 |
|
921 | 902 | tcsr_mutex: hwlock@740000 {
|
|
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