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64 | 64 | #define ICU_TINT_LEVEL_HIGH 2
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65 | 65 | #define ICU_TINT_LEVEL_LOW 3
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66 | 66 |
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67 |
| -#define ICU_TSSR_K(tint_nr) ((tint_nr) / 4) |
68 |
| -#define ICU_TSSR_TSSEL_N(tint_nr) ((tint_nr) % 4) |
69 | 67 | #define ICU_TSSR_TSSEL_PREP(tssel, n) ((tssel) << ((n) * 8))
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70 | 68 | #define ICU_TSSR_TSSEL_MASK(n) ICU_TSSR_TSSEL_PREP(0x7F, n)
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71 | 69 | #define ICU_TSSR_TIEN(n) (BIT(7) << ((n) * 8))
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84 | 82 | * struct rzv2h_hw_info - Interrupt Control Unit controller hardware info structure.
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85 | 83 | * @t_offs: TINT offset
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86 | 84 | * @max_tssel: TSSEL max value
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| 85 | + * @field_width: TSSR field width |
87 | 86 | */
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88 | 87 | struct rzv2h_hw_info {
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89 | 88 | u16 t_offs;
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90 | 89 | u8 max_tssel;
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| 90 | + u8 field_width; |
91 | 91 | };
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92 | 92 |
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93 | 93 | /**
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@@ -140,13 +140,15 @@ static void rzv2h_tint_irq_endisable(struct irq_data *d, bool enable)
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140 | 140 | struct rzv2h_icu_priv *priv = irq_data_to_priv(d);
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141 | 141 | unsigned int hw_irq = irqd_to_hwirq(d);
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142 | 142 | u32 tint_nr, tssel_n, k, tssr;
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| 143 | + u8 nr_tint; |
143 | 144 |
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144 | 145 | if (hw_irq < ICU_TINT_START)
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145 | 146 | return;
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146 | 147 |
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147 | 148 | tint_nr = hw_irq - ICU_TINT_START;
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148 |
| - k = ICU_TSSR_K(tint_nr); |
149 |
| - tssel_n = ICU_TSSR_TSSEL_N(tint_nr); |
| 149 | + nr_tint = 32 / priv->info->field_width; |
| 150 | + k = tint_nr / nr_tint; |
| 151 | + tssel_n = tint_nr % nr_tint; |
150 | 152 |
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151 | 153 | guard(raw_spinlock)(&priv->lock);
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152 | 154 | tssr = readl_relaxed(priv->base + priv->info->t_offs + ICU_TSSR(k));
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@@ -278,6 +280,7 @@ static int rzv2h_tint_set_type(struct irq_data *d, unsigned int type)
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278 | 280 | unsigned int hwirq;
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279 | 281 | u32 tint, sense;
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280 | 282 | int tint_nr;
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| 283 | + u8 nr_tint; |
281 | 284 |
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282 | 285 | switch (type & IRQ_TYPE_SENSE_MASK) {
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283 | 286 | case IRQ_TYPE_LEVEL_LOW:
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@@ -308,8 +311,9 @@ static int rzv2h_tint_set_type(struct irq_data *d, unsigned int type)
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308 | 311 | hwirq = irqd_to_hwirq(d);
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309 | 312 | tint_nr = hwirq - ICU_TINT_START;
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310 | 313 |
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311 |
| - tssr_k = ICU_TSSR_K(tint_nr); |
312 |
| - tssel_n = ICU_TSSR_TSSEL_N(tint_nr); |
| 314 | + nr_tint = 32 / priv->info->field_width; |
| 315 | + tssr_k = tint_nr / nr_tint; |
| 316 | + tssel_n = tint_nr % nr_tint; |
313 | 317 | tien = ICU_TSSR_TIEN(tssel_n);
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314 | 318 |
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315 | 319 | titsr_k = ICU_TITSR_K(tint_nr);
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@@ -519,6 +523,7 @@ static int rzv2h_icu_init_common(struct device_node *node, struct device_node *p
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519 | 523 | static const struct rzv2h_hw_info rzv2h_hw_params = {
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520 | 524 | .t_offs = 0,
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521 | 525 | .max_tssel = ICU_RZV2H_TSSEL_MAX_VAL,
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| 526 | + .field_width = 8, |
522 | 527 | };
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523 | 528 |
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524 | 529 | static int rzv2h_icu_init(struct device_node *node, struct device_node *parent)
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