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RISC-V: add non-alternative fallback for riscv_has_extension_[un]likely()
The has_fpu() check, which in turn calls riscv_has_extension_likely(), relies on alternatives to figure out whether the system has an FPU. As a result, it will malfunction on XIP kernels, as they do not support the alternatives mechanism. When alternatives support is not present, fall back to using __riscv_isa_extension_available() in riscv_has_extension_[un]likely() instead stead, which handily takes the same argument, so that kernels that do not support alternatives can accurately report the presence of FPU support. Fixes: 702e645 ("riscv: fpu: switch has_fpu() to riscv_has_extension_likely()") Link: https://lore.kernel.org/all/ad445951-3d13-4644-94d9-e0989cda39c3@spud/ Signed-off-by: Conor Dooley <[email protected]> Reviewed-by: Andrew Jones <[email protected]> Reviewed-by: Jason A. Donenfeld <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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arch/riscv/include/asm/hwcap.h

Lines changed: 30 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -57,18 +57,31 @@ struct riscv_isa_ext_data {
5757
unsigned int isa_ext_id;
5858
};
5959

60+
unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
61+
62+
#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)
63+
64+
bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
65+
#define riscv_isa_extension_available(isa_bitmap, ext) \
66+
__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
67+
6068
static __always_inline bool
6169
riscv_has_extension_likely(const unsigned long ext)
6270
{
6371
compiletime_assert(ext < RISCV_ISA_EXT_MAX,
6472
"ext must be < RISCV_ISA_EXT_MAX");
6573

66-
asm_volatile_goto(
67-
ALTERNATIVE("j %l[l_no]", "nop", 0, %[ext], 1)
68-
:
69-
: [ext] "i" (ext)
70-
:
71-
: l_no);
74+
if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
75+
asm_volatile_goto(
76+
ALTERNATIVE("j %l[l_no]", "nop", 0, %[ext], 1)
77+
:
78+
: [ext] "i" (ext)
79+
:
80+
: l_no);
81+
} else {
82+
if (!__riscv_isa_extension_available(NULL, ext))
83+
goto l_no;
84+
}
7285

7386
return true;
7487
l_no:
@@ -81,26 +94,23 @@ riscv_has_extension_unlikely(const unsigned long ext)
8194
compiletime_assert(ext < RISCV_ISA_EXT_MAX,
8295
"ext must be < RISCV_ISA_EXT_MAX");
8396

84-
asm_volatile_goto(
85-
ALTERNATIVE("nop", "j %l[l_yes]", 0, %[ext], 1)
86-
:
87-
: [ext] "i" (ext)
88-
:
89-
: l_yes);
97+
if (IS_ENABLED(CONFIG_RISCV_ALTERNATIVE)) {
98+
asm_volatile_goto(
99+
ALTERNATIVE("nop", "j %l[l_yes]", 0, %[ext], 1)
100+
:
101+
: [ext] "i" (ext)
102+
:
103+
: l_yes);
104+
} else {
105+
if (__riscv_isa_extension_available(NULL, ext))
106+
goto l_yes;
107+
}
90108

91109
return false;
92110
l_yes:
93111
return true;
94112
}
95113

96-
unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
97-
98-
#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)
99-
100-
bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
101-
#define riscv_isa_extension_available(isa_bitmap, ext) \
102-
__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
103-
104114
#endif
105115

106116
#endif /* _ASM_RISCV_HWCAP_H */

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