@@ -67,7 +67,7 @@ module_param(enable_dma, int, 0444);
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MODULE_PARM_DESC (enable_dma ,
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"Enable use of DMA on interfaces that support it (0=no dma [default], 1=use dma)" );
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- /**
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+ /*
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* Convert nanosecond based time to setting used in the
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* boot bus timing register, based on timing multiple
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*/
@@ -114,7 +114,7 @@ static void octeon_cf_set_boot_reg_cfg(int cs, unsigned int multiplier)
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cvmx_write_csr (CVMX_MIO_BOOT_REG_CFGX (cs ), reg_cfg .u64 );
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}
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- /**
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+ /*
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* Called after libata determines the needed PIO mode. This
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* function programs the Octeon bootbus regions to support the
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* timing requirements of the PIO mode.
@@ -278,7 +278,7 @@ static void octeon_cf_set_dmamode(struct ata_port *ap, struct ata_device *dev)
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cvmx_write_csr (cf_port -> dma_base + DMA_TIM , dma_tim .u64 );
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}
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- /**
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+ /*
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* Handle an 8 bit I/O request.
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*
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* @qc: Queued command
@@ -317,7 +317,7 @@ static unsigned int octeon_cf_data_xfer8(struct ata_queued_cmd *qc,
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return buflen ;
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}
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- /**
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+ /*
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* Handle a 16 bit I/O request.
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*
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* @qc: Queued command
@@ -372,7 +372,7 @@ static unsigned int octeon_cf_data_xfer16(struct ata_queued_cmd *qc,
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return buflen ;
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}
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- /**
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+ /*
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* Read the taskfile for 16bit non-True IDE only.
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*/
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static void octeon_cf_tf_read16 (struct ata_port * ap , struct ata_taskfile * tf )
@@ -453,7 +453,7 @@ static int octeon_cf_softreset16(struct ata_link *link, unsigned int *classes,
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return 0 ;
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}
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- /**
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+ /*
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* Load the taskfile for 16bit non-True IDE only. The device_addr is
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* not loaded, we do this as part of octeon_cf_exec_command16.
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*/
@@ -525,7 +525,7 @@ static void octeon_cf_dma_setup(struct ata_queued_cmd *qc)
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ap -> ops -> sff_exec_command (ap , & qc -> tf );
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}
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- /**
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+ /*
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* Start a DMA transfer that was already setup
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*
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* @qc: Information about the DMA
@@ -580,7 +580,7 @@ static void octeon_cf_dma_start(struct ata_queued_cmd *qc)
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cvmx_write_csr (cf_port -> dma_base + DMA_CFG , mio_boot_dma_cfg .u64 );
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}
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- /**
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+ /*
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*
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* LOCKING:
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* spin_lock_irqsave(host lock)
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