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sunxinpengJiri Kosina
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Jiri Kosina
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HID: intel-thc-hid: Add basic THC driver skeleton
Create intel-thc-hid folder and add Kconfig and Makefile for THC drivers. Add basic THC device context structure, definitions and related initialization APIs for THC Hardware layer driver. Also initialize regmap struct for future THC registers access. Co-developed-by: Even Xu <[email protected]> Signed-off-by: Even Xu <[email protected]> Signed-off-by: Xinpeng Sun <[email protected]> Tested-by: Rui Zhang <[email protected]> Tested-by: Mark Pearson <[email protected]> Reviewed-by: Srinivas Pandruvada <[email protected]> Reviewed-by: Mark Pearson <[email protected]> Tested-by: Aaron Ma <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
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‎MAINTAINERS

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@@ -11873,6 +11873,12 @@ S: Maintained
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F: arch/x86/include/asm/intel_telemetry.h
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F: drivers/platform/x86/intel/telemetry/
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INTEL TOUCH HOST CONTROLLER (THC) DRIVER
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M: Even Xu <[email protected]>
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M: Xinpeng Sun <[email protected]>
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S: Maintained
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F: drivers/hid/intel-thc-hid/
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INTEL TPMI DRIVER
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M: Srinivas Pandruvada <[email protected]>
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L: [email protected]

‎drivers/hid/Kconfig

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@@ -1386,4 +1386,6 @@ source "drivers/hid/amd-sfh-hid/Kconfig"
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source "drivers/hid/surface-hid/Kconfig"
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source "drivers/hid/intel-thc-hid/Kconfig"
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endif # HID_SUPPORT

‎drivers/hid/Makefile

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@@ -171,3 +171,5 @@ obj-$(INTEL_ISH_FIRMWARE_DOWNLOADER) += intel-ish-hid/
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obj-$(CONFIG_AMD_SFH_HID) += amd-sfh-hid/
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obj-$(CONFIG_SURFACE_HID_CORE) += surface-hid/
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obj-$(CONFIG_INTEL_THC_HID) += intel-thc-hid/

‎drivers/hid/intel-thc-hid/Kconfig

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# SPDX-License-Identifier: GPL-2.0
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# Copyright (c) 2024, Intel Corporation.
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menu "Intel THC HID Support"
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depends on X86_64 && PCI
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config INTEL_THC_HID
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tristate "Intel Touch Host Controller"
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select HID
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help
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THC (Touch Host Controller) is the name of the IP block in PCH that
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interfaces with Touch Devices (ex: touchscreen, touchpad etc.). It
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is comprised of 3 key functional blocks: A natively half-duplex
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Quad I/O capable SPI master; a low latency I2C interface to support
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HIDI2C compliant devices; a hardware sequencer with Read/Write DMA
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capability to system memory.
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Say Y/M here if you want to support Intel THC. If unsure, say N.
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endmenu

‎drivers/hid/intel-thc-hid/Makefile

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# SPDX-License-Identifier: GPL-2.0
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#
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# Makefile - Intel Touch Host Controller (THC) drivers
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# Copyright (c) 2024, Intel Corporation.
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#
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#
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obj-$(CONFIG_INTEL_THC_HID) += intel-thc.o
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intel-thc-objs += intel-thc/intel-thc-dev.o
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ccflags-y += -I $(src)/intel-thc

‎drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.c

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2024 Intel Corporation */
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#include <linux/regmap.h>
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#include "intel-thc-dev.h"
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static int thc_regmap_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct thc_device *thc_ctx = context;
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void __iomem *base = thc_ctx->mmio_addr;
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*val = ioread32(base + reg);
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return 0;
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}
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static int thc_regmap_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct thc_device *thc_ctx = context;
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void __iomem *base = thc_ctx->mmio_addr;
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iowrite32(val, base + reg);
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return 0;
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}
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static const struct regmap_range thc_rw_ranges[] = {
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regmap_reg_range(0x10, 0x14),
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regmap_reg_range(0x1000, 0x1320),
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};
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static const struct regmap_access_table thc_rw_table = {
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.yes_ranges = thc_rw_ranges,
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.n_yes_ranges = ARRAY_SIZE(thc_rw_ranges),
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};
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static const struct regmap_config thc_regmap_cfg = {
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.name = "thc_regmap_common",
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = 0x1320,
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.reg_read = thc_regmap_read,
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.reg_write = thc_regmap_write,
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.cache_type = REGCACHE_NONE,
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.fast_io = true,
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.rd_table = &thc_rw_table,
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.wr_table = &thc_rw_table,
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.volatile_table = &thc_rw_table,
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};
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/**
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* thc_clear_state - Clear THC hardware state
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*
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* @dev: The pointer of THC device structure
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*/
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static void thc_clear_state(const struct thc_device *dev)
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{
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u32 val;
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/* Clear interrupt cause register */
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val = THC_M_PRT_ERR_CAUSE_INVLD_DEV_ENTRY |
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THC_M_PRT_ERR_CAUSE_FRAME_BABBLE_ERR |
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THC_M_PRT_ERR_CAUSE_BUF_OVRRUN_ERR |
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THC_M_PRT_ERR_CAUSE_PRD_ENTRY_ERR;
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_ERR_CAUSE_OFFSET, val, val);
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/* Clear interrupt error state */
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_CNTRL_1_OFFSET,
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THC_M_PRT_READ_DMA_CNTRL_IE_STALL,
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THC_M_PRT_READ_DMA_CNTRL_IE_STALL);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_CNTRL_2_OFFSET,
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THC_M_PRT_READ_DMA_CNTRL_IE_STALL,
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THC_M_PRT_READ_DMA_CNTRL_IE_STALL);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_INT_STATUS_OFFSET,
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THC_M_PRT_INT_STATUS_TXN_ERR_INT_STS,
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THC_M_PRT_INT_STATUS_TXN_ERR_INT_STS);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_INT_STATUS_OFFSET,
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THC_M_PRT_INT_STATUS_FATAL_ERR_INT_STS,
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THC_M_PRT_INT_STATUS_FATAL_ERR_INT_STS);
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val = THC_M_PRT_INT_EN_TXN_ERR_INT_EN |
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THC_M_PRT_INT_EN_FATAL_ERR_INT_EN |
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THC_M_PRT_INT_EN_BUF_OVRRUN_ERR_INT_EN;
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_INT_EN_OFFSET, val, val);
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val = THC_M_PRT_SW_SEQ_STS_THC_SS_ERR |
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THC_M_PRT_SW_SEQ_STS_TSSDONE;
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SW_SEQ_STS_OFFSET, val, val);
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/* Clear RxDMA state */
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_CNTRL_1_OFFSET,
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THC_M_PRT_READ_DMA_CNTRL_IE_EOF, 0);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_CNTRL_2_OFFSET,
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THC_M_PRT_READ_DMA_CNTRL_IE_EOF, 0);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_INT_STS_1_OFFSET,
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THC_M_PRT_READ_DMA_INT_STS_EOF_INT_STS,
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THC_M_PRT_READ_DMA_INT_STS_EOF_INT_STS);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_INT_STS_2_OFFSET,
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THC_M_PRT_READ_DMA_INT_STS_EOF_INT_STS,
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THC_M_PRT_READ_DMA_INT_STS_EOF_INT_STS);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_INT_STS_1_OFFSET,
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THC_M_PRT_READ_DMA_INT_STS_NONDMA_INT_STS,
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THC_M_PRT_READ_DMA_INT_STS_NONDMA_INT_STS);
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/* Clear TxDMA state */
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_WRITE_DMA_CNTRL_OFFSET,
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THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_IE_IOC_DMACPL,
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THC_M_PRT_WRITE_DMA_CNTRL_THC_WRDMA_IE_IOC_DMACPL);
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val = THC_M_PRT_WRITE_INT_STS_THC_WRDMA_ERROR_STS |
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THC_M_PRT_WRITE_INT_STS_THC_WRDMA_IOC_STS |
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THC_M_PRT_WRITE_INT_STS_THC_WRDMA_CMPL_STATUS;
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_WRITE_INT_STS_OFFSET, val, val);
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/* Reset all DMAs count */
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_DB_CNT_1_OFFSET,
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THC_M_PRT_DB_CNT_1_THC_M_PRT_DB_CNT_RST,
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THC_M_PRT_DB_CNT_1_THC_M_PRT_DB_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_DEVINT_CNT_OFFSET,
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THC_M_PRT_DEVINT_CNT_THC_M_PRT_DEVINT_CNT_RST,
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THC_M_PRT_DEVINT_CNT_THC_M_PRT_DEVINT_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_READ_DMA_CNTRL_1_OFFSET,
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THC_M_PRT_READ_DMA_CNTRL_TPCPR,
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THC_M_PRT_READ_DMA_CNTRL_TPCPR);
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/* Reset THC hardware sequence state */
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_FRAME_DROP_CNT_1_OFFSET,
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THC_M_PRT_FRAME_DROP_CNT_1_RFDC,
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THC_M_PRT_FRAME_DROP_CNT_1_RFDC);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_FRAME_DROP_CNT_2_OFFSET,
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THC_M_PRT_FRAME_DROP_CNT_2_RFDC,
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THC_M_PRT_FRAME_DROP_CNT_2_RFDC);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_FRM_CNT_1_OFFSET,
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THC_M_PRT_FRM_CNT_1_THC_M_PRT_FRM_CNT_RST,
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THC_M_PRT_FRM_CNT_1_THC_M_PRT_FRM_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_FRM_CNT_2_OFFSET,
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THC_M_PRT_FRM_CNT_2_THC_M_PRT_FRM_CNT_RST,
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THC_M_PRT_FRM_CNT_2_THC_M_PRT_FRM_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_RXDMA_PKT_CNT_1_OFFSET,
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THC_M_PRT_RXDMA_PKT_CNT_1_THC_M_PRT_RXDMA_PKT_CNT_RST,
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THC_M_PRT_RXDMA_PKT_CNT_1_THC_M_PRT_RXDMA_PKT_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_RXDMA_PKT_CNT_2_OFFSET,
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THC_M_PRT_RXDMA_PKT_CNT_2_THC_M_PRT_RXDMA_PKT_CNT_RST,
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THC_M_PRT_RXDMA_PKT_CNT_2_THC_M_PRT_RXDMA_PKT_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SWINT_CNT_1_OFFSET,
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THC_M_PRT_SWINT_CNT_1_THC_M_PRT_SWINT_CNT_RST,
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THC_M_PRT_SWINT_CNT_1_THC_M_PRT_SWINT_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_SWINT_CNT_1_OFFSET,
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THC_M_PRT_SWINT_CNT_1_THC_M_PRT_SWINT_CNT_RST,
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THC_M_PRT_SWINT_CNT_1_THC_M_PRT_SWINT_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_TX_FRM_CNT_OFFSET,
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THC_M_PRT_TX_FRM_CNT_THC_M_PRT_TX_FRM_CNT_RST,
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THC_M_PRT_TX_FRM_CNT_THC_M_PRT_TX_FRM_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_TXDMA_PKT_CNT_OFFSET,
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THC_M_PRT_TXDMA_PKT_CNT_THC_M_PRT_TXDMA_PKT_CNT_RST,
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THC_M_PRT_TXDMA_PKT_CNT_THC_M_PRT_TXDMA_PKT_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_UFRM_CNT_1_OFFSET,
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THC_M_PRT_UFRM_CNT_1_THC_M_PRT_UFRM_CNT_RST,
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THC_M_PRT_UFRM_CNT_1_THC_M_PRT_UFRM_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_UFRM_CNT_2_OFFSET,
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THC_M_PRT_UFRM_CNT_2_THC_M_PRT_UFRM_CNT_RST,
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THC_M_PRT_UFRM_CNT_2_THC_M_PRT_UFRM_CNT_RST);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_PRD_EMPTY_CNT_1_OFFSET,
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THC_M_PRT_PRD_EMPTY_CNT_1_RPTEC,
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THC_M_PRT_PRD_EMPTY_CNT_1_RPTEC);
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regmap_write_bits(dev->thc_regmap, THC_M_PRT_PRD_EMPTY_CNT_2_OFFSET,
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THC_M_PRT_PRD_EMPTY_CNT_2_RPTEC,
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THC_M_PRT_PRD_EMPTY_CNT_2_RPTEC);
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}
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/**
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* thc_dev_init - Allocate and initialize the THC device structure
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*
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* @device: The pointer of device structure
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* @mem_addr: The pointer of MMIO memory address
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*
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* Return: The thc_device pointer on success, NULL on failed.
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*/
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struct thc_device *thc_dev_init(struct device *device, void __iomem *mem_addr)
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{
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struct thc_device *thc_dev;
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int ret;
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thc_dev = devm_kzalloc(device, sizeof(*thc_dev), GFP_KERNEL);
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if (!thc_dev)
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return ERR_PTR(-ENOMEM);
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thc_dev->dev = device;
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thc_dev->mmio_addr = mem_addr;
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thc_dev->thc_regmap = devm_regmap_init(device, NULL, thc_dev, &thc_regmap_cfg);
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if (IS_ERR(thc_dev->thc_regmap)) {
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ret = PTR_ERR(thc_dev->thc_regmap);
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dev_err_once(device, "Failed to init thc_regmap: %d\n", ret);
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return ERR_PTR(ret);
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}
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thc_clear_state(thc_dev);
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return thc_dev;
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}
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EXPORT_SYMBOL_NS_GPL(thc_dev_init, "INTEL_THC");
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MODULE_AUTHOR("Xinpeng Sun <[email protected]>");
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MODULE_AUTHOR("Even Xu <[email protected]>");
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MODULE_DESCRIPTION("Intel(R) Intel THC Hardware Driver");
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MODULE_LICENSE("GPL");

‎drivers/hid/intel-thc-hid/intel-thc/intel-thc-dev.h

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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2024 Intel Corporation */
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#ifndef _INTEL_THC_DEV_H_
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#define _INTEL_THC_DEV_H_
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#include <linux/cdev.h>
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#define THC_REGMAP_COMMON_OFFSET 0x10
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#define THC_REGMAP_MMIO_OFFSET 0x1000
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/**
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* struct thc_device - THC private device struct
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* @thc_regmap: MMIO regmap structure for accessing THC registers
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* @mmio_addr: MMIO registers address
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*/
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struct thc_device {
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struct device *dev;
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struct regmap *thc_regmap;
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void __iomem *mmio_addr;
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};
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struct thc_device *thc_dev_init(struct device *device, void __iomem *mem_addr);
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#endif /* _INTEL_THC_DEV_H_ */

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