arm64: dts: st: Use 128kB size for aliased GIC400 register access on stm32mp21 SoCs

Adjust the size of 8kB GIC regions to 128kB so that each 4kB is mapped
16 times over a 64kB region.
The offset is then adjusted in the irq-gic driver.

see commit 12e1406 ("irqchip/GIC: Add workaround for aliased GIC400")

Fixes: 7a57b1b ("arm64: dts: st: introduce stm32mp21 SoCs family")
Suggested-by: Marc Zyngier <[email protected]>
Signed-off-by: Christian Bruel <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Alexandre Torgue <[email protected]>
Signed-off-by: Arnd Bergmann <[email protected]>

Author: Christian Bruel

arch/arm64/boot/dts/st/stm32mp211.dtsi

@@ -118,9 +118,9 @@
 		intc: interrupt-controller@4ac10000 {
 			compatible = "arm,gic-400";
 			reg = <0x4ac10000 0x0 0x1000>,
-			      <0x4ac20000 0x0 0x2000>,
-			      <0x4ac40000 0x0 0x2000>,
-			      <0x4ac60000 0x0 0x2000>;
+			      <0x4ac20000 0x0 0x20000>,
+			      <0x4ac40000 0x0 0x20000>,
+			      <0x4ac60000 0x0 0x20000>;
 			      #interrupt-cells = <3>;
 			      interrupt-controller;
 		};