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Josua-SRgclement
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arm64: dts: add description for solidrun cn9130 som and clearfog boards
Add description for the SolidRun CN9130 SoM, and Clearfog Base / Pro reference boards. The SoM has been designed as a pin-compatible replacement for the older Armada 388 based SoM. Therefore it supports the same boards and a similar feature set. Most notable upgrades: - 4x Cortex-A72 - 10Gbps SFP - Both eMMC and SD supported at the same time The developer first supporting this product at SolidRun decided to use different filenames for the DTBs: Armada 388 uses the full "clearfog" string while cn9130 uses the abbreviation "cf". This name is already hard-coded in pre-installed vendor u-boot and can not be changed easily. NOTICE IN CASE ANYBODY WANTS TO SELF-UPGRADE: CN9130 SoM has a different footprint from Armada 388 SoM. Components on the carrier board below the SoM may collide causing damage, such as on Clearfog Base. Signed-off-by: Josua Mayer <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Signed-off-by: Gregory CLEMENT <[email protected]>
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arch/arm64/boot/dts/marvell/Makefile

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@@ -28,3 +28,5 @@ dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-A.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += cn9130-crb-B.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += ac5x-rd-carrier-cn9131.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += ac5-98dx35xx-rd.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-base.dtb
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dtb-$(CONFIG_ARCH_MVEBU) += cn9130-cf-pro.dtb
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2024 Josua Mayer <[email protected]>
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*
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* DTS for SolidRun CN9130 Clearfog Base.
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*
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*/
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/dts-v1/;
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include "cn9130.dtsi"
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#include "cn9130-sr-som.dtsi"
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#include "cn9130-cf.dtsi"
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/ {
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model = "SolidRun CN9130 Clearfog Base";
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compatible = "solidrun,cn9130-clearfog-base",
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"solidrun,cn9130-sr-som", "marvell,cn9130";
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gpio-keys {
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compatible = "gpio-keys";
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pinctrl-0 = <&rear_button_pins>;
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pinctrl-names = "default";
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button-0 {
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/* The rear SW3 button */
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label = "Rear Button";
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gpios = <&cp0_gpio1 31 GPIO_ACTIVE_LOW>;
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linux,can-disable;
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linux,code = <BTN_0>;
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};
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};
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rfkill-m2-gnss {
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compatible = "rfkill-gpio";
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label = "m.2 GNSS";
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radio-type = "gps";
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/* rfkill-gpio inverts internally */
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shutdown-gpios = <&expander0 9 GPIO_ACTIVE_HIGH>;
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};
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/* M.2 is B-keyed, so w-disable is for WWAN */
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rfkill-m2-wwan {
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compatible = "rfkill-gpio";
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label = "m.2 WWAN";
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radio-type = "wwan";
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/* rfkill-gpio inverts internally */
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shutdown-gpios = <&expander0 8 GPIO_ACTIVE_HIGH>;
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};
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};
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/* SRDS #3 - SGMII 1GE */
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&cp0_eth1 {
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phy = <&phy1>;
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phys = <&cp0_comphy3 1>;
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phy-mode = "sgmii";
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status = "okay";
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};
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&cp0_eth2_phy {
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/*
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* Configure LEDs default behaviour:
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* - LED[0]: link/activity: On/blink (green)
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* - LED[1]: link is 100/1000Mbps: On (yellow)
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* - LED[2]: high impedance (floating)
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*/
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marvell,reg-init = <3 16 0xf000 0x0a61>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_WAN;
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default-state = "keep";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_WAN;
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default-state = "keep";
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};
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};
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};
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&cp0_gpio1 {
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sim-select-hog {
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gpio-hog;
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gpios = <27 GPIO_ACTIVE_HIGH>;
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output-high;
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line-name = "sim-select";
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};
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};
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&cp0_mdio {
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phy1: ethernet-phy@1 {
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reg = <1>;
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/*
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* Configure LEDs default behaviour:
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* - LED[0]: link/activity: On/blink (green)
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* - LED[1]: link is 100/1000Mbps: On (yellow)
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* - LED[2]: high impedance (floating)
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*
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* Configure LEDs electrical polarity
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* - on-state: low
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* - off-state: high (not hi-z, to avoid residual glow)
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*/
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marvell,reg-init = <3 16 0xf000 0x0a61>,
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<3 17 0x003f 0x000a>;
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leds {
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#address-cells = <1>;
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#size-cells = <0>;
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led@0 {
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reg = <0>;
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color = <LED_COLOR_ID_GREEN>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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led@1 {
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reg = <1>;
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color = <LED_COLOR_ID_YELLOW>;
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function = LED_FUNCTION_LAN;
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default-state = "keep";
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};
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};
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};
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};
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&cp0_pinctrl {
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pinctrl-0 = <&sim_select_pins>;
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pintrl-names = "default";
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rear_button_pins: cp0-rear-button-pins {
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marvell,pins = "mpp31";
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marvell,function = "gpio";
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};
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sim_select_pins: cp0-sim-select-pins {
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marvell,pins = "mpp27";
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marvell,function = "gpio";
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};
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};
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/*
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* SRDS #4 - USB 3.0 host on M.2 connector
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* USB-2.0 Host on Type-A connector
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*/
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&cp0_usb3_1 {
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phys = <&cp0_comphy4 1>, <&cp0_utmi1>;
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phy-names = "comphy", "utmi";
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dr_mode = "host";
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status = "okay";
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};
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&expander0 {
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m2-full-card-power-off-hog {
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gpio-hog;
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gpios = <2 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "m2-full-card-power-off";
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};
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m2-reset-hog {
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gpio-hog;
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gpios = <10 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "m2-reset";
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};
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};

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