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Merge series "Some bug fix for lpspi" from Clark Wang <[email protected]>:
Hi, This patchset mainly fixes some recently discovered problems about CS for LPSPI module on i.MX8DXLEVK. Add the dt-bindings description for the new property. Clark Wang (4): spi: lpspi: Fix kernel warning dump when probe fail after calling spi_register spi: lpspi: remove unused fsl_lpspi->chipselect spi: lpspi: fix using CS discontinuously on i.MX8DXLEVK dt-bindings: lpspi: New property in document DT bindings for LPSPI .../bindings/spi/spi-fsl-lpspi.yaml | 7 ++++++ drivers/spi/spi-fsl-lpspi.c | 25 +++++++++++-------- 2 files changed, 21 insertions(+), 11 deletions(-) -- 2.17.1
2 parents 7ac9bbf + 2a05259 commit 1d5cd4e

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drivers/spi/spi-fsl-lpspi.c

Lines changed: 14 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -98,6 +98,7 @@ struct fsl_lpspi_data {
9898
struct clk *clk_ipg;
9999
struct clk *clk_per;
100100
bool is_slave;
101+
bool is_only_cs1;
101102
bool is_first_byte;
102103

103104
void *rx_buf;
@@ -119,8 +120,6 @@ struct fsl_lpspi_data {
119120
bool usedma;
120121
struct completion dma_rx_completion;
121122
struct completion dma_tx_completion;
122-
123-
int chipselect[];
124123
};
125124

126125
static const struct of_device_id fsl_lpspi_dt_ids[] = {
@@ -259,10 +258,9 @@ static void fsl_lpspi_set_cmd(struct fsl_lpspi_data *fsl_lpspi)
259258

260259
temp |= fsl_lpspi->config.bpw - 1;
261260
temp |= (fsl_lpspi->config.mode & 0x3) << 30;
261+
temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
262262
if (!fsl_lpspi->is_slave) {
263263
temp |= fsl_lpspi->config.prescale << 27;
264-
temp |= (fsl_lpspi->config.chip_select & 0x3) << 24;
265-
266264
/*
267265
* Set TCR_CONT will keep SS asserted after current transfer.
268266
* For the first transfer, clear TCR_CONTC to assert SS.
@@ -423,7 +421,10 @@ static int fsl_lpspi_setup_transfer(struct spi_controller *controller,
423421
fsl_lpspi->config.mode = spi->mode;
424422
fsl_lpspi->config.bpw = t->bits_per_word;
425423
fsl_lpspi->config.speed_hz = t->speed_hz;
426-
fsl_lpspi->config.chip_select = spi->chip_select;
424+
if (fsl_lpspi->is_only_cs1)
425+
fsl_lpspi->config.chip_select = 1;
426+
else
427+
fsl_lpspi->config.chip_select = spi->chip_select;
427428

428429
if (!fsl_lpspi->config.speed_hz)
429430
fsl_lpspi->config.speed_hz = spi->max_speed_hz;
@@ -837,6 +838,8 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
837838
fsl_lpspi = spi_controller_get_devdata(controller);
838839
fsl_lpspi->dev = &pdev->dev;
839840
fsl_lpspi->is_slave = is_slave;
841+
fsl_lpspi->is_only_cs1 = of_property_read_bool((&pdev->dev)->of_node,
842+
"fsl,spi-only-use-cs1-sel");
840843

841844
controller->bits_per_word_mask = SPI_BPW_RANGE_MASK(8, 32);
842845
controller->transfer_one = fsl_lpspi_transfer_one;
@@ -850,12 +853,6 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
850853
if (!fsl_lpspi->is_slave)
851854
controller->use_gpio_descriptors = true;
852855

853-
ret = devm_spi_register_controller(&pdev->dev, controller);
854-
if (ret < 0) {
855-
dev_err(&pdev->dev, "spi_register_controller error.\n");
856-
goto out_controller_put;
857-
}
858-
859856
init_completion(&fsl_lpspi->xfer_done);
860857

861858
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
@@ -913,6 +910,12 @@ static int fsl_lpspi_probe(struct platform_device *pdev)
913910
if (ret < 0)
914911
dev_err(&pdev->dev, "dma setup error %d, use pio\n", ret);
915912

913+
ret = devm_spi_register_controller(&pdev->dev, controller);
914+
if (ret < 0) {
915+
dev_err(&pdev->dev, "spi_register_controller error.\n");
916+
goto out_pm_get;
917+
}
918+
916919
pm_runtime_mark_last_busy(fsl_lpspi->dev);
917920
pm_runtime_put_autosuspend(fsl_lpspi->dev);
918921

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