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dt-bindings: phy: rockchip: Convert RK3399 PCIe PHY to schema
Convert the Rockchip RK3399 PCIe PHY to DT schema format. Move the example to the GRF binding as that has the complete block. Signed-off-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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# SPDX-License-Identifier: GPL-2.0
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/rockchip,rk3399-pcie-phy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Rockchip RK3399 PCIE PHY
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maintainers:
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- Heiko Stuebner <[email protected]>
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properties:
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compatible:
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const: rockchip,rk3399-pcie-phy
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'#phy-cells':
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oneOf:
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- const: 0
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deprecated: true
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- const: 1
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description: One lane per phy mode
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clocks:
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maxItems: 1
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clock-names:
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const: refclk
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resets:
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maxItems: 1
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reset-names:
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const: phy
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required:
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- compatible
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- '#phy-cells'
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- clocks
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- clock-names
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- resets
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- reset-names
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additionalProperties: false
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...

Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt

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Documentation/devicetree/bindings/soc/rockchip/grf.yaml

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pcie-phy:
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type: object
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description:
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Documentation/devicetree/bindings/phy/rockchip-pcie-phy.txt
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$ref: /schemas/phy/rockchip,rk3399-pcie-phy.yaml#
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unevaluatedProperties: false
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patternProperties:
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"^phy@[0-9a-f]+$":
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#phy-cells = <0>;
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};
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pcie-phy {
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compatible = "rockchip,rk3399-pcie-phy";
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#phy-cells = <1>;
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clocks = <&cru SCLK_PCIEPHY_REF>;
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clock-names = "refclk";
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resets = <&cru SRST_PCIEPHY>;
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reset-names = "phy";
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};
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phy@f780 {
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compatible = "rockchip,rk3399-emmc-phy";
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reg = <0xf780 0x20>;

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