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bastien-curutchetkrzk
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memory: ti-aemif: Store timings parameter in number of cycles - 1
The CS configuration register expects timings to be expressed in 'number of cycles - 1' but they are stored in ns in the struct aemif_cs_data. So at init, the timings currently set are converted to ns by aemif_get_hw_params(), updated with values from the device-tree properties, and then converted back to 'number of cycles - 1' before being applied. Store the timings directly in 'number of cycles - 1' instead of nanoseconds. Perform the conversion from nanosecond during the device-tree parsing. Remove aemif_cycles_to_nsec() as it isn't used anymore. Signed-off-by: Bastien Curutchet <[email protected]> Reviewed-by: Miquel Raynal <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
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drivers/memory/ti-aemif.c

Lines changed: 79 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -82,26 +82,26 @@
8282
/**
8383
* struct aemif_cs_data: structure to hold cs parameters
8484
* @cs: chip-select number
85-
* @wstrobe: write strobe width, ns
86-
* @rstrobe: read strobe width, ns
87-
* @wsetup: write setup width, ns
88-
* @whold: write hold width, ns
89-
* @rsetup: read setup width, ns
90-
* @rhold: read hold width, ns
91-
* @ta: minimum turn around time, ns
85+
* @wstrobe: write strobe width, number of cycles - 1
86+
* @rstrobe: read strobe width, number of cycles - 1
87+
* @wsetup: write setup width, number of cycles - 1
88+
* @whold: write hold width, number of cycles - 1
89+
* @rsetup: read setup width, number of cycles - 1
90+
* @rhold: read hold width, number of cycles - 1
91+
* @ta: minimum turn around time, number of cycles - 1
9292
* @enable_ss: enable/disable select strobe mode
9393
* @enable_ew: enable/disable extended wait mode
9494
* @asize: width of the asynchronous device's data bus
9595
*/
9696
struct aemif_cs_data {
9797
u8 cs;
98-
u16 wstrobe;
99-
u16 rstrobe;
100-
u8 wsetup;
101-
u8 whold;
102-
u8 rsetup;
103-
u8 rhold;
104-
u8 ta;
98+
u32 wstrobe;
99+
u32 rstrobe;
100+
u32 wsetup;
101+
u32 whold;
102+
u32 rsetup;
103+
u32 rhold;
104+
u32 ta;
105105
u8 enable_ss;
106106
u8 enable_ew;
107107
u8 asize;
@@ -175,26 +175,18 @@ static int aemif_config_abus(struct platform_device *pdev, int csnum)
175175
struct aemif_device *aemif = platform_get_drvdata(pdev);
176176
struct aemif_cs_data *data = &aemif->cs_data[csnum];
177177
int ta, rhold, rstrobe, rsetup, whold, wstrobe, wsetup;
178-
unsigned long clk_rate = aemif->clk_rate;
179178
unsigned offset;
180179
u32 set, val;
181180

182181
offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
183182

184-
ta = aemif_calc_rate(pdev, data->ta, clk_rate, TA_MAX);
185-
rhold = aemif_calc_rate(pdev, data->rhold, clk_rate, RHOLD_MAX);
186-
rstrobe = aemif_calc_rate(pdev, data->rstrobe, clk_rate, RSTROBE_MAX);
187-
rsetup = aemif_calc_rate(pdev, data->rsetup, clk_rate, RSETUP_MAX);
188-
whold = aemif_calc_rate(pdev, data->whold, clk_rate, WHOLD_MAX);
189-
wstrobe = aemif_calc_rate(pdev, data->wstrobe, clk_rate, WSTROBE_MAX);
190-
wsetup = aemif_calc_rate(pdev, data->wsetup, clk_rate, WSETUP_MAX);
191-
192-
if (ta < 0 || rhold < 0 || rstrobe < 0 || rsetup < 0 ||
193-
whold < 0 || wstrobe < 0 || wsetup < 0) {
194-
dev_err(&pdev->dev, "%s: cannot get suitable timings\n",
195-
__func__);
196-
return -EINVAL;
197-
}
183+
ta = data->ta;
184+
rhold = data->rhold;
185+
rstrobe = data->rstrobe;
186+
rsetup = data->rsetup;
187+
whold = data->whold;
188+
wstrobe = data->wstrobe;
189+
wsetup = data->wsetup;
198190

199191
set = TA(ta) | RHOLD(rhold) | RSTROBE(rstrobe) | RSETUP(rsetup) |
200192
WHOLD(whold) | WSTROBE(wstrobe) | WSETUP(wsetup);
@@ -213,11 +205,6 @@ static int aemif_config_abus(struct platform_device *pdev, int csnum)
213205
return 0;
214206
}
215207

216-
static inline int aemif_cycles_to_nsec(int val, unsigned long clk_rate)
217-
{
218-
return ((val + 1) * NSEC_PER_MSEC) / clk_rate;
219-
}
220-
221208
/**
222209
* aemif_get_hw_params - function to read hw register values
223210
* @pdev: platform device to read for
@@ -231,19 +218,18 @@ static void aemif_get_hw_params(struct platform_device *pdev, int csnum)
231218
{
232219
struct aemif_device *aemif = platform_get_drvdata(pdev);
233220
struct aemif_cs_data *data = &aemif->cs_data[csnum];
234-
unsigned long clk_rate = aemif->clk_rate;
235221
u32 val, offset;
236222

237223
offset = A1CR_OFFSET + (data->cs - aemif->cs_offset) * 4;
238224
val = readl(aemif->base + offset);
239225

240-
data->ta = aemif_cycles_to_nsec(TA_VAL(val), clk_rate);
241-
data->rhold = aemif_cycles_to_nsec(RHOLD_VAL(val), clk_rate);
242-
data->rstrobe = aemif_cycles_to_nsec(RSTROBE_VAL(val), clk_rate);
243-
data->rsetup = aemif_cycles_to_nsec(RSETUP_VAL(val), clk_rate);
244-
data->whold = aemif_cycles_to_nsec(WHOLD_VAL(val), clk_rate);
245-
data->wstrobe = aemif_cycles_to_nsec(WSTROBE_VAL(val), clk_rate);
246-
data->wsetup = aemif_cycles_to_nsec(WSETUP_VAL(val), clk_rate);
226+
data->ta = TA_VAL(val);
227+
data->rhold = RHOLD_VAL(val);
228+
data->rstrobe = RSTROBE_VAL(val);
229+
data->rsetup = RSETUP_VAL(val);
230+
data->whold = WHOLD_VAL(val);
231+
data->wstrobe = WSTROBE_VAL(val);
232+
data->wsetup = WSETUP_VAL(val);
247233
data->enable_ew = EW_VAL(val);
248234
data->enable_ss = SSTROBE_VAL(val);
249235
data->asize = val & ASIZE_MAX;
@@ -261,7 +247,9 @@ static int of_aemif_parse_abus_config(struct platform_device *pdev,
261247
struct device_node *np)
262248
{
263249
struct aemif_device *aemif = platform_get_drvdata(pdev);
250+
unsigned long clk_rate = aemif->clk_rate;
264251
struct aemif_cs_data *data;
252+
int ret;
265253
u32 cs;
266254
u32 val;
267255

@@ -287,26 +275,61 @@ static int of_aemif_parse_abus_config(struct platform_device *pdev,
287275
aemif_get_hw_params(pdev, aemif->num_cs++);
288276

289277
/* override the values from device node */
290-
if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val))
291-
data->ta = val;
278+
if (!of_property_read_u32(np, "ti,cs-min-turnaround-ns", &val)) {
279+
ret = aemif_calc_rate(pdev, val, clk_rate, TA_MAX);
280+
if (ret < 0)
281+
return ret;
292282

293-
if (!of_property_read_u32(np, "ti,cs-read-hold-ns", &val))
294-
data->rhold = val;
283+
data->ta = ret;
284+
}
295285

296-
if (!of_property_read_u32(np, "ti,cs-read-strobe-ns", &val))
297-
data->rstrobe = val;
286+
if (!of_property_read_u32(np, "ti,cs-read-hold-ns", &val)) {
287+
ret = aemif_calc_rate(pdev, val, clk_rate, RHOLD_MAX);
288+
if (ret < 0)
289+
return ret;
298290

299-
if (!of_property_read_u32(np, "ti,cs-read-setup-ns", &val))
300-
data->rsetup = val;
291+
data->rhold = ret;
292+
}
301293

302-
if (!of_property_read_u32(np, "ti,cs-write-hold-ns", &val))
303-
data->whold = val;
294+
if (!of_property_read_u32(np, "ti,cs-read-strobe-ns", &val)) {
295+
ret = aemif_calc_rate(pdev, val, clk_rate, RSTROBE_MAX);
296+
if (ret < 0)
297+
return ret;
304298

305-
if (!of_property_read_u32(np, "ti,cs-write-strobe-ns", &val))
306-
data->wstrobe = val;
299+
data->rstrobe = ret;
300+
}
307301

308-
if (!of_property_read_u32(np, "ti,cs-write-setup-ns", &val))
309-
data->wsetup = val;
302+
if (!of_property_read_u32(np, "ti,cs-read-setup-ns", &val)) {
303+
ret = aemif_calc_rate(pdev, val, clk_rate, RSETUP_MAX);
304+
if (ret < 0)
305+
return ret;
306+
307+
data->rsetup = ret;
308+
}
309+
310+
if (!of_property_read_u32(np, "ti,cs-write-hold-ns", &val)) {
311+
ret = aemif_calc_rate(pdev, val, clk_rate, WHOLD_MAX);
312+
if (ret < 0)
313+
return ret;
314+
315+
data->whold = ret;
316+
}
317+
318+
if (!of_property_read_u32(np, "ti,cs-write-strobe-ns", &val)) {
319+
ret = aemif_calc_rate(pdev, val, clk_rate, WSTROBE_MAX);
320+
if (ret < 0)
321+
return ret;
322+
323+
data->wstrobe = ret;
324+
}
325+
326+
if (!of_property_read_u32(np, "ti,cs-write-setup-ns", &val)) {
327+
ret = aemif_calc_rate(pdev, val, clk_rate, WSETUP_MAX);
328+
if (ret < 0)
329+
return ret;
330+
331+
data->wsetup = ret;
332+
}
310333

311334
if (!of_property_read_u32(np, "ti,cs-bus-width", &val))
312335
if (val == 16)

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