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lyndonlialexdeucher
lyndonli
authored and
alexdeucher
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drm/amd/pm: update driver if header for smu_13_0_7
update driver if header for smu_13_0_7 Signed-off-by: lyndonli <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Reviewed-by: Kenneth Feng <[email protected]> Reviewed-by: Evan Quan <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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‎drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/smu13_driver_if_v13_0_7.h

Lines changed: 79 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -25,10 +25,10 @@
2525

2626
// *** IMPORTANT ***
2727
// PMFW TEAM: Always increment the interface version on any change to this file
28-
#define SMU13_DRIVER_IF_VERSION 0x2C
28+
#define SMU13_DRIVER_IF_VERSION 0x35
2929

3030
//Increment this version if SkuTable_t or BoardTable_t change
31-
#define PPTABLE_VERSION 0x20
31+
#define PPTABLE_VERSION 0x27
3232

3333
#define NUM_GFXCLK_DPM_LEVELS 16
3434
#define NUM_SOCCLK_DPM_LEVELS 8
@@ -96,7 +96,7 @@
9696
#define FEATURE_MEM_TEMP_READ_BIT 47
9797
#define FEATURE_ATHUB_MMHUB_PG_BIT 48
9898
#define FEATURE_SOC_PCC_BIT 49
99-
#define FEATURE_SPARE_50_BIT 50
99+
#define FEATURE_EDC_PWRBRK_BIT 50
100100
#define FEATURE_SPARE_51_BIT 51
101101
#define FEATURE_SPARE_52_BIT 52
102102
#define FEATURE_SPARE_53_BIT 53
@@ -282,15 +282,15 @@ typedef enum {
282282
} I2cControllerPort_e;
283283

284284
typedef enum {
285-
I2C_CONTROLLER_NAME_VR_GFX = 0,
286-
I2C_CONTROLLER_NAME_VR_SOC,
287-
I2C_CONTROLLER_NAME_VR_VMEMP,
288-
I2C_CONTROLLER_NAME_VR_VDDIO,
289-
I2C_CONTROLLER_NAME_LIQUID0,
290-
I2C_CONTROLLER_NAME_LIQUID1,
291-
I2C_CONTROLLER_NAME_PLX,
292-
I2C_CONTROLLER_NAME_OTHER,
293-
I2C_CONTROLLER_NAME_COUNT,
285+
I2C_CONTROLLER_NAME_VR_GFX = 0,
286+
I2C_CONTROLLER_NAME_VR_SOC,
287+
I2C_CONTROLLER_NAME_VR_VMEMP,
288+
I2C_CONTROLLER_NAME_VR_VDDIO,
289+
I2C_CONTROLLER_NAME_LIQUID0,
290+
I2C_CONTROLLER_NAME_LIQUID1,
291+
I2C_CONTROLLER_NAME_PLX,
292+
I2C_CONTROLLER_NAME_FAN_INTAKE,
293+
I2C_CONTROLLER_NAME_COUNT,
294294
} I2cControllerName_e;
295295

296296
typedef enum {
@@ -302,15 +302,17 @@ typedef enum {
302302
I2C_CONTROLLER_THROTTLER_LIQUID0,
303303
I2C_CONTROLLER_THROTTLER_LIQUID1,
304304
I2C_CONTROLLER_THROTTLER_PLX,
305+
I2C_CONTROLLER_THROTTLER_FAN_INTAKE,
305306
I2C_CONTROLLER_THROTTLER_INA3221,
306307
I2C_CONTROLLER_THROTTLER_COUNT,
307308
} I2cControllerThrottler_e;
308309

309310
typedef enum {
310311
I2C_CONTROLLER_PROTOCOL_VR_XPDE132G5,
311312
I2C_CONTROLLER_PROTOCOL_VR_IR35217,
312-
I2C_CONTROLLER_PROTOCOL_TMP_TMP102A,
313+
I2C_CONTROLLER_PROTOCOL_TMP_MAX31875,
313314
I2C_CONTROLLER_PROTOCOL_INA3221,
315+
I2C_CONTROLLER_PROTOCOL_TMP_MAX6604,
314316
I2C_CONTROLLER_PROTOCOL_COUNT,
315317
} I2cControllerProtocol_e;
316318

@@ -690,13 +692,21 @@ typedef struct {
690692
#define PP_OD_FEATURE_UCLK_BIT 8
691693
#define PP_OD_FEATURE_ZERO_FAN_BIT 9
692694
#define PP_OD_FEATURE_TEMPERATURE_BIT 10
695+
#define PP_OD_FEATURE_POWER_FEATURE_CTRL_BIT 11
696+
#define PP_OD_FEATURE_ASIC_TDC_BIT 12
697+
#define PP_OD_FEATURE_COUNT 13
693698

694699
typedef enum {
695700
PP_OD_POWER_FEATURE_ALWAYS_ENABLED,
696701
PP_OD_POWER_FEATURE_DISABLED_WHILE_GAMING,
697702
PP_OD_POWER_FEATURE_ALWAYS_DISABLED,
698703
} PP_OD_POWER_FEATURE_e;
699704

705+
typedef enum {
706+
FAN_MODE_AUTO = 0,
707+
FAN_MODE_MANUAL_LINEAR,
708+
} FanMode_e;
709+
700710
typedef struct {
701711
uint32_t FeatureCtrlMask;
702712

@@ -708,8 +718,8 @@ typedef struct {
708718
uint8_t RuntimePwrSavingFeaturesCtrl;
709719

710720
//Frequency changes
711-
int16_t GfxclkFmin; // MHz
712-
int16_t GfxclkFmax; // MHz
721+
int16_t GfxclkFmin; // MHz
722+
int16_t GfxclkFmax; // MHz
713723
uint16_t UclkFmin; // MHz
714724
uint16_t UclkFmax; // MHz
715725

@@ -730,7 +740,12 @@ typedef struct {
730740
uint8_t MaxOpTemp;
731741
uint8_t Padding[4];
732742

733-
uint32_t Spare[12];
743+
uint16_t GfxVoltageFullCtrlMode;
744+
uint16_t GfxclkFullCtrlMode;
745+
uint16_t UclkFullCtrlMode;
746+
int16_t AsicTdc;
747+
748+
uint32_t Spare[10];
734749
uint32_t MmHubPadding[8]; // SMU internal use. Adding here instead of external as a workaround
735750
} OverDriveTable_t;
736751

@@ -748,8 +763,8 @@ typedef struct {
748763
uint8_t IdlePwrSavingFeaturesCtrl;
749764
uint8_t RuntimePwrSavingFeaturesCtrl;
750765

751-
uint16_t GfxclkFmin; // MHz
752-
uint16_t GfxclkFmax; // MHz
766+
int16_t GfxclkFmin; // MHz
767+
int16_t GfxclkFmax; // MHz
753768
uint16_t UclkFmin; // MHz
754769
uint16_t UclkFmax; // MHz
755770

@@ -769,7 +784,12 @@ typedef struct {
769784
uint8_t MaxOpTemp;
770785
uint8_t Padding[4];
771786

772-
uint32_t Spare[12];
787+
uint16_t GfxVoltageFullCtrlMode;
788+
uint16_t GfxclkFullCtrlMode;
789+
uint16_t UclkFullCtrlMode;
790+
int16_t AsicTdc;
791+
792+
uint32_t Spare[10];
773793

774794
} OverDriveLimits_t;
775795

@@ -903,7 +923,8 @@ typedef struct {
903923
uint16_t FanStartTempMin;
904924
uint16_t FanStartTempMax;
905925

906-
uint32_t Spare[12];
926+
uint16_t PowerMinPpt0[POWER_SOURCE_COUNT];
927+
uint32_t Spare[11];
907928

908929
} MsgLimits_t;
909930

@@ -1086,11 +1107,13 @@ typedef struct {
10861107
uint32_t GfxoffSpare[15];
10871108

10881109
// GFX GPO
1089-
float DfllBtcMasterScalerM;
1110+
uint32_t DfllBtcMasterScalerM;
10901111
int32_t DfllBtcMasterScalerB;
1091-
float DfllBtcSlaveScalerM;
1112+
uint32_t DfllBtcSlaveScalerM;
10921113
int32_t DfllBtcSlaveScalerB;
1093-
uint32_t GfxGpoSpare[12];
1114+
uint32_t DfllPccAsWaitCtrl; //GDFLL_AS_WAIT_CTRL_PCC register value to be passed to RLC msg
1115+
uint32_t DfllPccAsStepCtrl; //GDFLL_AS_STEP_CTRL_PCC register value to be passed to RLC msg
1116+
uint32_t GfxGpoSpare[10];
10941117

10951118
// GFX DCS
10961119

@@ -1106,7 +1129,10 @@ typedef struct {
11061129
uint16_t DcsTimeout; //This is the amount of time SMU FW waits for RLC to put GFX into GFXOFF before reverting to the fallback mechanism of throttling GFXCLK to Fmin.
11071130

11081131

1109-
uint32_t DcsSpare[16];
1132+
uint32_t DcsSpare[14];
1133+
1134+
// UCLK section
1135+
uint16_t ShadowFreqTableUclk[NUM_UCLK_DPM_LEVELS]; // In MHz
11101136

11111137
// UCLK section
11121138
uint8_t UseStrobeModeOptimizations; //Set to indicate that FW should use strobe mode optimizations
@@ -1163,13 +1189,14 @@ typedef struct {
11631189
uint16_t IntakeTempHighIntakeAcousticLimit;
11641190
uint16_t IntakeTempAcouticLimitReleaseRate;
11651191

1166-
uint16_t FanStalledTempLimitOffset;
1192+
int16_t FanAbnormalTempLimitOffset;
11671193
uint16_t FanStalledTriggerRpm;
1168-
uint16_t FanAbnormalTriggerRpm;
1169-
uint16_t FanPadding;
1170-
1171-
uint32_t FanSpare[14];
1194+
uint16_t FanAbnormalTriggerRpmCoeff;
1195+
uint16_t FanAbnormalDetectionEnable;
11721196

1197+
uint8_t FanIntakeSensorSupport;
1198+
uint8_t FanIntakePadding[3];
1199+
uint32_t FanSpare[13];
11731200
// SECTION: VDD_GFX AVFS
11741201

11751202
uint8_t OverrideGfxAvfsFuses;
@@ -1193,7 +1220,6 @@ typedef struct {
11931220
uint32_t dGbV_dT_vmin;
11941221
uint32_t dGbV_dT_vmax;
11951222

1196-
//Unused: PMFW-9370
11971223
uint32_t V2F_vmin_range_low;
11981224
uint32_t V2F_vmin_range_high;
11991225
uint32_t V2F_vmax_range_low;
@@ -1238,8 +1264,21 @@ typedef struct {
12381264
// SECTION: Advanced Options
12391265
uint32_t DebugOverrides;
12401266

1267+
// Section: Total Board Power idle vs active coefficients
1268+
uint8_t TotalBoardPowerSupport;
1269+
uint8_t TotalBoardPowerPadding[3];
1270+
1271+
int16_t TotalIdleBoardPowerM;
1272+
int16_t TotalIdleBoardPowerB;
1273+
int16_t TotalBoardPowerM;
1274+
int16_t TotalBoardPowerB;
1275+
1276+
QuadraticInt_t qFeffCoeffGameClock[POWER_SOURCE_COUNT];
1277+
QuadraticInt_t qFeffCoeffBaseClock[POWER_SOURCE_COUNT];
1278+
QuadraticInt_t qFeffCoeffBoostClock[POWER_SOURCE_COUNT];
1279+
12411280
// SECTION: Sku Reserved
1242-
uint32_t Spare[64];
1281+
uint32_t Spare[43];
12431282

12441283
// Padding for MMHUB - do not modify this
12451284
uint32_t MmHubPadding[8];
@@ -1304,7 +1343,8 @@ typedef struct {
13041343
// SECTION: Clock Spread Spectrum
13051344

13061345
// UCLK Spread Spectrum
1307-
uint16_t UclkSpreadPadding;
1346+
uint8_t UclkTrainingModeSpreadPercent; // Q4.4
1347+
uint8_t UclkSpreadPadding;
13081348
uint16_t UclkSpreadFreq; // kHz
13091349

13101350
// UCLK Spread Spectrum
@@ -1317,11 +1357,7 @@ typedef struct {
13171357

13181358
// Section: Memory Config
13191359
uint8_t DramWidth; // Width of interface to the channel for each DRAM module. See DRAM_BIT_WIDTH_TYPE_e
1320-
uint8_t PaddingMem1[3];
1321-
1322-
// Section: Total Board Power
1323-
uint16_t TotalBoardPower; //Only needed for TCP Estimated case, where TCP = TGP+Total Board Power
1324-
uint16_t BoardPowerPadding;
1360+
uint8_t PaddingMem1[7];
13251361

13261362
// SECTION: UMC feature flags
13271363
uint8_t HsrEnabled;
@@ -1423,8 +1459,11 @@ typedef struct {
14231459
uint16_t Vcn1ActivityPercentage ;
14241460

14251461
uint32_t EnergyAccumulator;
1426-
uint16_t AverageSocketPower ;
1462+
uint16_t AverageSocketPower;
1463+
uint16_t AverageTotalBoardPower;
1464+
14271465
uint16_t AvgTemperature[TEMP_COUNT];
1466+
uint16_t AvgTemperatureFanIntake;
14281467

14291468
uint8_t PcieRate ;
14301469
uint8_t PcieWidth ;
@@ -1592,5 +1631,7 @@ typedef struct {
15921631
#define IH_INTERRUPT_CONTEXT_ID_AUDIO_D0 0x5
15931632
#define IH_INTERRUPT_CONTEXT_ID_AUDIO_D3 0x6
15941633
#define IH_INTERRUPT_CONTEXT_ID_THERMAL_THROTTLING 0x7
1634+
#define IH_INTERRUPT_CONTEXT_ID_FAN_ABNORMAL 0x8
1635+
#define IH_INTERRUPT_CONTEXT_ID_FAN_RECOVERY 0x9
15951636

15961637
#endif

‎drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@
3131
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_4 0x07
3232
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_5 0x04
3333
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_0_10 0x32
34-
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_7 0x2C
34+
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_7 0x35
3535
#define SMU13_DRIVER_IF_VERSION_SMU_V13_0_10 0x1D
3636

3737
#define SMU13_MODE1_RESET_WAIT_TIME_IN_MS 500 //500ms

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