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cristiccvinodkoul
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phy: rockchip: samsung-hdptx: Do no set rk_hdptx_phy->rate in case of errors
Ensure rk_hdptx_ropll_tmds_cmn_config() updates hdptx->rate only after all the other operations have been successful. Fixes: c4b09c5 ("phy: phy-rockchip-samsung-hdptx: Add clock provider support") Signed-off-by: Cristian Ciocaltea <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1006,9 +1006,7 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx,
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{
10071007
const struct ropll_config *cfg = NULL;
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struct ropll_config rc = {0};
1009-
int i;
1010-
1011-
hdptx->rate = rate * 100;
1009+
int ret, i;
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for (i = 0; i < ARRAY_SIZE(ropll_tmds_cfg); i++)
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if (rate == ropll_tmds_cfg[i].bit_rate) {
@@ -1063,7 +1061,11 @@ static int rk_hdptx_ropll_tmds_cmn_config(struct rk_hdptx_phy *hdptx,
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regmap_update_bits(hdptx->regmap, CMN_REG(0086), PLL_PCG_CLK_EN_MASK,
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FIELD_PREP(PLL_PCG_CLK_EN_MASK, 0x1));
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1066-
return rk_hdptx_post_enable_pll(hdptx);
1064+
ret = rk_hdptx_post_enable_pll(hdptx);
1065+
if (!ret)
1066+
hdptx->rate = rate * 100;
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return ret;
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}
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static int rk_hdptx_ropll_tmds_mode_config(struct rk_hdptx_phy *hdptx,

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