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Christoph Hellwigsuryasaimadhu
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x86/mm: Add a x86_has_pat_wp() helper
Abstract the ioremap code away from the caching mode internals. Signed-off-by: Christoph Hellwig <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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-6
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3 files changed

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arch/x86/include/asm/memtype.h

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@@ -24,4 +24,6 @@ extern void memtype_free_io(resource_size_t start, resource_size_t end);
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extern bool pat_pfn_immune_to_uc_mtrr(unsigned long pfn);
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bool x86_has_pat_wp(void);
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#endif /* _ASM_X86_MEMTYPE_H */

arch/x86/mm/init.c

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@@ -71,6 +71,12 @@ uint8_t __pte2cachemode_tbl[8] = {
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};
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EXPORT_SYMBOL(__pte2cachemode_tbl);
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/* Check that the write-protect PAT entry is set for write-protect */
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bool x86_has_pat_wp(void)
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{
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return __pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] == _PAGE_CACHE_MODE_WP;
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}
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static unsigned long __initdata pgt_buf_start;
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static unsigned long __initdata pgt_buf_end;
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static unsigned long __initdata pgt_buf_top;

arch/x86/mm/ioremap.c

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Original file line numberDiff line numberDiff line change
@@ -778,10 +778,8 @@ void __init *early_memremap_encrypted(resource_size_t phys_addr,
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void __init *early_memremap_encrypted_wp(resource_size_t phys_addr,
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unsigned long size)
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{
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/* Be sure the write-protect PAT entry is set for write-protect */
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if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)
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if (!x86_has_pat_wp())
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return NULL;
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return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_ENC_WP);
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}
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@@ -799,10 +797,8 @@ void __init *early_memremap_decrypted(resource_size_t phys_addr,
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void __init *early_memremap_decrypted_wp(resource_size_t phys_addr,
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unsigned long size)
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{
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/* Be sure the write-protect PAT entry is set for write-protect */
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if (__pte2cachemode_tbl[_PAGE_CACHE_MODE_WP] != _PAGE_CACHE_MODE_WP)
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if (!x86_has_pat_wp())
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return NULL;
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return early_memremap_prot(phys_addr, size, __PAGE_KERNEL_NOENC_WP);
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}
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#endif /* CONFIG_AMD_MEM_ENCRYPT */

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