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Wolfram Sangvinodkoul
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dt-bindings: dma: rz-dmac: Document RZ/A1H SoC
Document the Renesas RZ/A1H DMAC block. This one does not have clocks, resets and power domains. Update the bindings accordingly. Introduce a generic name in the header to make future additions easier. Signed-off-by: Wolfram Sang <[email protected]> Acked-by: Rob Herring (Arm) <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

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$id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Renesas RZ/{G2L,G2UL,V2L} DMA Controller
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title: Renesas RZ DMA Controller
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maintainers:
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- Biju Das <[email protected]>
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allOf:
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- $ref: dma-controller.yaml#
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properties:
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compatible:
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items:
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- enum:
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- renesas,r7s72100-dmac # RZ/A1H
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- renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five
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- renesas,r9a07g044-dmac # RZ/G2{L,LC}
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- renesas,r9a07g054-dmac # RZ/V2L
@@ -93,13 +91,26 @@ required:
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- reg
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- interrupts
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- interrupt-names
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- clocks
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- clock-names
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- '#dma-cells'
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- dma-channels
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- power-domains
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- resets
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- reset-names
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allOf:
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- $ref: dma-controller.yaml#
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- if:
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not:
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properties:
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compatible:
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contains:
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enum:
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- renesas,r7s72100-dmac
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then:
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required:
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- clocks
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- clock-names
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- power-domains
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- resets
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- reset-names
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additionalProperties: false
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