@@ -39,8 +39,7 @@ static const struct pll_vco lucid_ole_vco[] = {
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};
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static const struct alpha_pll_config gpu_cc_pll0_config = {
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- /* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
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- .l = 0x4444000d ,
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+ .l = 0x0d ,
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.alpha = 0x0 ,
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.config_ctl_val = 0x20485699 ,
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.config_ctl_hi_val = 0x00182261 ,
@@ -71,8 +70,7 @@ static struct clk_alpha_pll gpu_cc_pll0 = {
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};
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static const struct alpha_pll_config gpu_cc_pll1_config = {
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- /* .l includes RINGOSC_CAL_L_VAL, CAL_L_VAL, L_VAL fields */
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- .l = 0x44440016 ,
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+ .l = 0x16 ,
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.alpha = 0xeaaa ,
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.config_ctl_val = 0x20485699 ,
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.config_ctl_hi_val = 0x00182261 ,
@@ -574,8 +572,8 @@ static int gpu_cc_sm8550_probe(struct platform_device *pdev)
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if (IS_ERR (regmap ))
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return PTR_ERR (regmap );
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- clk_lucid_evo_pll_configure (& gpu_cc_pll0 , regmap , & gpu_cc_pll0_config );
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- clk_lucid_evo_pll_configure (& gpu_cc_pll1 , regmap , & gpu_cc_pll1_config );
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+ clk_lucid_ole_pll_configure (& gpu_cc_pll0 , regmap , & gpu_cc_pll0_config );
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+ clk_lucid_ole_pll_configure (& gpu_cc_pll1 , regmap , & gpu_cc_pll1_config );
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/*
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* Keep clocks always enabled:
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