iommu/amd: Fix domain flush size when syncing iotlb

When running on an AMD vIOMMU, we observed multiple invalidations (of
decreasing power of 2 aligned sizes) when unmapping a single page.

Domain flush takes gather bounds (end-start) as size param. However,
gather->end is defined as the last inclusive address (start + size - 1).
This leads to an off by 1 error.

With this patch, verified that 1 invalidation occurs when unmapping a
single page.

Fixes: a270be1 ("iommu/amd: Use only natural aligned flushes in a VM")
Cc: [email protected] # >= 5.15
Signed-off-by: Jon Pan-Doh <[email protected]>
Tested-by: Sudheer Dantuluri <[email protected]>
Suggested-by: Gary Zibrat <[email protected]>
Reviewed-by: Vasant Hegde <[email protected]>
Acked-by: Nadav Amit <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Joerg Roedel <[email protected]>

Author: Jon Pan-Doh

drivers/iommu/amd/iommu.c

@@ -2398,7 +2398,7 @@ static void amd_iommu_iotlb_sync(struct iommu_domain *domain,
 	unsigned long flags;
 
 	spin_lock_irqsave(&dom->lock, flags);
-	domain_flush_pages(dom, gather->start, gather->end - gather->start, 1);
+	domain_flush_pages(dom, gather->start, gather->end - gather->start + 1, 1);
 	amd_iommu_domain_flush_complete(dom);
 	spin_unlock_irqrestore(&dom->lock, flags);
 }