Merge tag 'soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC updates from Arnd Bergmann:
 "The SoC updates this time are mainly removing obsolete code from the
  OMAP2 platform, another step in the eternal cleanup of that platform.

  There are two new SoCs getting added: STMicroelectronics stm32mp13 and
  Microchip lan966. Both fit into existing platforms and require minimal
  changes here.

  A couple of MAINTAINER file updates relate to those changes, and
  update some file paths"

* tag 'soc-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (28 commits)
  MAINTAINERS: Update BCM7XXX entry with additional patterns
  MAINTAINERS: add pinctrl-apple-gpio to ARM/APPLE MACHINE
  MAINTAINERS: Add pasemi i2c to ARM/APPLE MACHINE
  ARM: SPEAr: Update MAINTAINERS entries
  ARM: OMAP2+: Drop unused CM defines for am3
  ARM: OMAP2+: Drop unused CM and SCRM defines for omap4
  ARM: OMAP2+: Drop unused CM and SCRM defines for omap5
  ARM: OMAP2+: Drop unused CM defines for dra7
  ARM: OMAP2+: Drop unused PRM defines for am3
  ARM: OMAP2+: Drop unused PRM defines for am4
  ARM: OMAP2+: Drop unused PRM defines for omap4
  ARM: OMAP2+: Drop unused PRM defines for omap5
  ARM: OMAP2+: Drop unused PRM defines for dra7
  ARM: OMAP2+: Fix comment typo
  ARM: OMAP2+: Fix typo in some comments
  ARM: at91: add basic support for new SoC family lan966
  dt-bindings: arm: at91: Document lan966 pcb8291 and pcb8290 boards
  ARM: at91: Documentation: add lan966 family
  ARM: at91: Documentation: add sama7g5 family
  MAINTAINERS: add an entry for NXP S32G boards
  ...

Author: torvalds

Documentation/arm/index.rst

@@ -55,6 +55,7 @@ SoC-specific documents
    stm32/stm32h750-overview
    stm32/stm32f769-overview
    stm32/stm32f429-overview
+   stm32/stm32mp13-overview
    stm32/stm32mp157-overview
 
    sunxi

Documentation/arm/microchip.rst

@@ -137,6 +137,26 @@ the Microchip website: http://www.microchip.com.
 
           http://ww1.microchip.com/downloads/en/DeviceDoc/DS60001476B.pdf
 
+    * ARM Cortex-A7 based SoCs
+      - sama7g5 family
+
+        - sama7g51
+        - sama7g52
+        - sama7g53
+        - sama7g54 (device superset)
+
+          * Datasheet
+
+          Coming soon
+
+      - lan966 family
+        - lan9662
+        - lan9668
+
+          * Datasheet
+
+          Coming soon
+
     * ARM Cortex-M7 MCUs
       - sams70 family
 

Documentation/arm/stm32/stm32mp13-overview.rst

@@ -0,0 +1,37 @@
+===================
+STM32MP13 Overview
+===================
+
+Introduction
+------------
+
+The STM32MP131/STM32MP133/STM32MP135 are Cortex-A MPU aimed at various applications.
+They feature:
+
+- One Cortex-A7 application core
+- Standard memories interface support
+- Standard connectivity, widely inherited from the STM32 MCU family
+- Comprehensive security support
+
+More details:
+
+- Cortex-A7 core running up to @900MHz
+- FMC controller to connect SDRAM, NOR and NAND memories
+- QSPI
+- SD/MMC/SDIO support
+- 2*Ethernet controller
+- CAN
+- ADC/DAC
+- USB EHCI/OHCI controllers
+- USB OTG
+- I2C, SPI, CAN busses support
+- Several general purpose timers
+- Serial Audio interface
+- LCD controller
+- DCMIPP
+- SPDIFRX
+- DFSDM
+
+:Authors:
+
+- Alexandre Torgue <[email protected]>

Documentation/devicetree/bindings/arm/atmel-at91.yaml

@@ -150,6 +150,18 @@ properties:
           - const: microchip,sama7g5
           - const: microchip,sama7
 
+      - description: Microchip LAN9662 PCB8291 Evaluation Board.
+        items:
+          - const: microchip,lan9662-pcb8291
+          - const: microchip,lan9662
+          - const: microchip,lan966
+
+      - description: Microchip LAN9668 PCB8290 Evaluation Board.
+        items:
+          - const: microchip,lan9668-pcb8290
+          - const: microchip,lan9668
+          - const: microchip,lan966
+
       - items:
           - enum:
               - atmel,sams70j19

MAINTAINERS

@@ -1721,13 +1721,17 @@ B:	https://github.com/AsahiLinux/linux/issues
 C:	irc://irc.oftc.net/asahi-dev
 T:	git https://github.com/AsahiLinux/linux.git
 F:	Documentation/devicetree/bindings/arm/apple.yaml
+F:	Documentation/devicetree/bindings/i2c/apple,i2c.yaml
 F:	Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
 F:	Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml
 F:	Documentation/devicetree/bindings/pci/apple,pcie.yaml
 F:	Documentation/devicetree/bindings/pinctrl/apple,pinctrl.yaml
 F:	arch/arm64/boot/dts/apple/
+F:	drivers/i2c/busses/i2c-pasemi-core.c
+F:	drivers/i2c/busses/i2c-pasemi-platform.c
 F:	drivers/irqchip/irq-apple-aic.c
 F:	drivers/mailbox/apple-mailbox.c
+F:	drivers/pinctrl/pinctrl-apple-gpio.c
 F:	include/dt-bindings/interrupt-controller/apple-aic.h
 F:	include/dt-bindings/pinctrl/apple.h
 F:	include/linux/apple-mailbox.h
@@ -2315,6 +2319,14 @@ F:	arch/arm/boot/dts/nuvoton-wpcm450*
 F:	arch/arm/mach-npcm/wpcm450.c
 F:	drivers/*/*wpcm*
 
+ARM/NXP S32G ARCHITECTURE
+M:	Chester Lin <[email protected]>
+R:	Andreas Färber <[email protected]>
+R:	Matthias Brugger <[email protected]>
+L:	[email protected] (moderated for non-subscribers)
+S:	Maintained
+F:	arch/arm64/boot/dts/freescale/s32g*.dts*
+
 ARM/OPENMOKO NEO FREERUNNER (GTA02) MACHINE SUPPORT
 L:	[email protected] (subscribers-only)
 S:	Orphan
@@ -3633,6 +3645,8 @@ F:	arch/arm/mm/cache-b15-rac.c
 F:	drivers/bus/brcmstb_gisb.c
 F:	drivers/pci/controller/pcie-brcmstb.c
 N:	brcmstb
+N:	bcm7038
+N:	bcm7120
 
 BROADCOM BDC DRIVER
 M:	Al Cooper <[email protected]>
@@ -14987,13 +15001,6 @@ L:	[email protected]
 S:	Maintained
 F:	drivers/pinctrl/pinctrl-single.c
 
-PIN CONTROLLER - ST SPEAR
-M:	Viresh Kumar <[email protected]>
-L:	[email protected] (moderated for non-subscribers)
-S:	Maintained
-W:	http://www.st.com/spear
-F:	drivers/pinctrl/spear/
-
 PKTCDVD DRIVER
 M:	[email protected]
 S:	Orphan
@@ -17771,21 +17778,17 @@ W:	https://github.com/linux-speakup/speakup
 B:	https://github.com/linux-speakup/speakup/issues
 F:	drivers/accessibility/speakup/
 
-SPEAR CLOCK FRAMEWORK SUPPORT
-M:	Viresh Kumar <[email protected]>
-L:	[email protected] (moderated for non-subscribers)
-S:	Maintained
-W:	http://www.st.com/spear
-F:	drivers/clk/spear/
-
-SPEAR PLATFORM SUPPORT
+SPEAR PLATFORM/CLOCK/PINCTRL SUPPORT
 M:	Viresh Kumar <[email protected]>
 M:	Shiraz Hashim <[email protected]>
+M:	[email protected]
 L:	[email protected] (moderated for non-subscribers)
 S:	Maintained
 W:	http://www.st.com/spear
 F:	arch/arm/boot/dts/spear*
 F:	arch/arm/mach-spear/
+F:	drivers/clk/spear/
+F:	drivers/pinctrl/spear/
 
 SPI NOR SUBSYSTEM
 M:	Tudor Ambarus <[email protected]>

arch/arm/mach-at91/Kconfig

@@ -67,6 +67,15 @@ config SOC_SAMA7G5
 	help
 	  Select this if you are using one of Microchip's SAMA7G5 family SoC.
 
+config SOC_LAN966
+	bool "ARMv7 based Microchip LAN966 SoC family"
+	depends on ARCH_MULTI_V7
+	select DW_APB_TIMER_OF
+	select ARM_GIC
+	select MEMORY
+	help
+	  This enables support for ARMv7 based Microchip LAN966 SoC family.
+
 config SOC_AT91RM9200
 	bool "AT91RM9200"
 	depends on ARCH_MULTI_V4T

arch/arm/mach-omap2/cm-regbits-44xx.h

@@ -20,71 +20,11 @@
 #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H
 
 #define OMAP4430_ABE_STATDEP_SHIFT				3
-#define OMAP4430_AUTO_DPLL_MODE_MASK				(0x7 << 0)
-#define OMAP4430_CLKSEL_SHIFT					24
-#define OMAP4430_CLKSEL_WIDTH					0x1
-#define OMAP4430_CLKSEL_MASK					(1 << 24)
-#define OMAP4430_CLKSEL_0_0_SHIFT				0
-#define OMAP4430_CLKSEL_0_0_WIDTH				0x1
-#define OMAP4430_CLKSEL_0_1_SHIFT				0
-#define OMAP4430_CLKSEL_0_1_WIDTH				0x2
-#define OMAP4430_CLKSEL_24_25_SHIFT				24
-#define OMAP4430_CLKSEL_24_25_WIDTH				0x2
-#define OMAP4430_CLKSEL_60M_SHIFT				24
-#define OMAP4430_CLKSEL_60M_WIDTH				0x1
-#define OMAP4430_CLKSEL_AESS_FCLK_SHIFT				24
-#define OMAP4430_CLKSEL_AESS_FCLK_WIDTH				0x1
-#define OMAP4430_CLKSEL_CORE_SHIFT				0
-#define OMAP4430_CLKSEL_CORE_WIDTH				0x1
-#define OMAP4430_CLKSEL_DIV_SHIFT				24
-#define OMAP4430_CLKSEL_DIV_WIDTH				0x1
-#define OMAP4430_CLKSEL_FCLK_SHIFT				24
-#define OMAP4430_CLKSEL_FCLK_WIDTH				0x2
-#define OMAP4430_CLKSEL_INTERNAL_SOURCE_SHIFT			25
-#define OMAP4430_CLKSEL_INTERNAL_SOURCE_WIDTH			0x1
-#define OMAP4430_CLKSEL_L3_SHIFT				4
-#define OMAP4430_CLKSEL_L3_WIDTH				0x1
-#define OMAP4430_CLKSEL_L4_SHIFT				8
-#define OMAP4430_CLKSEL_L4_WIDTH				0x1
-#define OMAP4430_CLKSEL_OPP_SHIFT				0
-#define OMAP4430_CLKSEL_OPP_WIDTH				0x2
-#define OMAP4430_CLKSEL_PMD_STM_CLK_SHIFT			27
-#define OMAP4430_CLKSEL_PMD_STM_CLK_WIDTH			0x3
-#define OMAP4430_CLKSEL_PMD_TRACE_CLK_MASK			(0x7 << 24)
-#define OMAP4430_CLKSEL_SGX_FCLK_MASK				(1 << 24)
-#define OMAP4430_CLKSEL_SOURCE_MASK				(0x3 << 24)
-#define OMAP4430_CLKSEL_SOURCE_24_24_MASK			(1 << 24)
-#define OMAP4430_CLKSEL_UTMI_P1_SHIFT				24
-#define OMAP4430_CLKSEL_UTMI_P1_WIDTH				0x1
-#define OMAP4430_CLKSEL_UTMI_P2_SHIFT				25
-#define OMAP4430_CLKSEL_UTMI_P2_WIDTH				0x1
 #define OMAP4430_CLKTRCTRL_SHIFT				0
 #define OMAP4430_CLKTRCTRL_MASK					(0x3 << 0)
-#define OMAP4430_DPLL_BYP_CLKSEL_SHIFT				23
-#define OMAP4430_DPLL_BYP_CLKSEL_WIDTH				0x1
-#define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK			(0x1f << 0)
-#define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT			8
-#define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK			(1 << 10)
-#define OMAP4430_DPLL_CLKOUT_DIV_SHIFT				0
-#define OMAP4430_DPLL_CLKOUT_DIV_WIDTH				0x5
-#define OMAP4430_DPLL_CLKOUT_DIV_MASK				(0x1f << 0)
-#define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK			(0x7f << 0)
-#define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK			(1 << 8)
-#define OMAP4430_DPLL_DIV_MASK					(0x7f << 0)
-#define OMAP4430_DPLL_DIV_0_7_MASK				(0xff << 0)
-#define OMAP4430_DPLL_EN_MASK					(0x7 << 0)
-#define OMAP4430_DPLL_LPMODE_EN_MASK				(1 << 10)
-#define OMAP4430_DPLL_MULT_MASK					(0x7ff << 8)
-#define OMAP4430_DPLL_MULT_USB_MASK				(0xfff << 8)
-#define OMAP4430_DPLL_REGM4XEN_MASK				(1 << 11)
-#define OMAP4430_DPLL_SD_DIV_MASK				(0xff << 24)
 #define OMAP4430_DSS_STATDEP_SHIFT				8
 #define OMAP4430_DUCATI_STATDEP_SHIFT				0
 #define OMAP4430_GFX_STATDEP_SHIFT				10
-#define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK			(0x1f << 0)
-#define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK			(0x1f << 0)
-#define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK			(0x1f << 0)
-#define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK			(0x1f << 0)
 #define OMAP4430_IDLEST_SHIFT					16
 #define OMAP4430_IDLEST_MASK					(0x3 << 16)
 #define OMAP4430_IVAHD_STATDEP_SHIFT				2
@@ -98,46 +38,5 @@
 #define OMAP4430_MEMIF_STATDEP_SHIFT				4
 #define OMAP4430_MODULEMODE_SHIFT				0
 #define OMAP4430_MODULEMODE_MASK				(0x3 << 0)
-#define OMAP4430_OPTFCLKEN_48MHZ_CLK_SHIFT			9
-#define OMAP4430_OPTFCLKEN_BGAP_32K_SHIFT			8
-#define OMAP4430_OPTFCLKEN_CLK32K_SHIFT				8
-#define OMAP4430_OPTFCLKEN_CTRLCLK_SHIFT			8
-#define OMAP4430_OPTFCLKEN_DBCLK_SHIFT				8
-#define OMAP4430_OPTFCLKEN_DSSCLK_SHIFT				8
-#define OMAP4430_OPTFCLKEN_FCLK_SHIFT				8
-#define OMAP4430_OPTFCLKEN_FCLK0_SHIFT				8
-#define OMAP4430_OPTFCLKEN_FCLK1_SHIFT				9
-#define OMAP4430_OPTFCLKEN_FCLK2_SHIFT				10
-#define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT			15
-#define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT		13
-#define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT		14
-#define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT			11
-#define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT			12
-#define OMAP4430_OPTFCLKEN_PER24MC_GFCLK_SHIFT			8
-#define OMAP4430_OPTFCLKEN_PERABE24M_GFCLK_SHIFT		9
-#define OMAP4430_OPTFCLKEN_PHY_48M_SHIFT			8
-#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_SHIFT			10
-#define OMAP4430_OPTFCLKEN_SLIMBUS_CLK_11_11_SHIFT		11
-#define OMAP4430_OPTFCLKEN_SYS_CLK_SHIFT			10
-#define OMAP4460_OPTFCLKEN_TS_FCLK_SHIFT			8
-#define OMAP4430_OPTFCLKEN_TV_CLK_SHIFT				11
-#define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT			8
-#define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT			9
-#define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT			10
-#define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT			8
-#define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT			9
-#define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT			10
-#define OMAP4430_OPTFCLKEN_XCLK_SHIFT				8
-#define OMAP4430_PAD_CLKS_GATE_SHIFT				8
-#define OMAP4430_PMD_STM_MUX_CTRL_SHIFT				20
-#define OMAP4430_PMD_STM_MUX_CTRL_WIDTH				0x2
-#define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT			22
-#define OMAP4430_PMD_TRACE_MUX_CTRL_WIDTH			0x2
-#define OMAP4430_SCALE_FCLK_SHIFT				0
-#define OMAP4430_SCALE_FCLK_WIDTH				0x1
-#define OMAP4430_SLIMBUS_CLK_GATE_SHIFT				10
-#define OMAP4430_ST_DPLL_CLK_MASK				(1 << 0)
-#define OMAP4430_SYS_CLKSEL_SHIFT				0
-#define OMAP4430_SYS_CLKSEL_WIDTH				0x3
 #define OMAP4430_TESLA_STATDEP_SHIFT				1
 #endif