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Suzuki K Poulosemathieupoirier
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coresight: trbe: Decouple buffer base from the hardware base
We always set the TRBBASER_EL1 to the base of the virtual ring buffer. We are about to change this for working around an erratum. So, in preparation to that, allow the driver to choose a different base for the TRBBASER_EL1 (which is within the buffer range). Cc: Anshuman Khandual <[email protected]> Cc: Mike Leach <[email protected]> Cc: Mathieu Poirier <[email protected]> Cc: Leo Yan <[email protected]> Reviewed-by: Anshuman Khandual <[email protected]> Signed-off-by: Suzuki K Poulose <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mathieu Poirier <[email protected]>
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drivers/hwtracing/coresight/coresight-trbe.c

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,8 @@ struct trbe_buf {
5757
* trbe_limit sibling pointers.
5858
*/
5959
unsigned long trbe_base;
60+
/* The base programmed into the TRBE */
61+
unsigned long trbe_hw_base;
6062
unsigned long trbe_limit;
6163
unsigned long trbe_write;
6264
int nr_pages;
@@ -470,12 +472,13 @@ static void set_trbe_limit_pointer_enabled(unsigned long addr)
470472

471473
static void trbe_enable_hw(struct trbe_buf *buf)
472474
{
473-
WARN_ON(buf->trbe_write < buf->trbe_base);
475+
WARN_ON(buf->trbe_hw_base < buf->trbe_base);
476+
WARN_ON(buf->trbe_write < buf->trbe_hw_base);
474477
WARN_ON(buf->trbe_write >= buf->trbe_limit);
475478
set_trbe_disabled();
476479
isb();
477480
clr_trbe_status();
478-
set_trbe_base_pointer(buf->trbe_base);
481+
set_trbe_base_pointer(buf->trbe_hw_base);
479482
set_trbe_write_pointer(buf->trbe_write);
480483

481484
/*
@@ -520,7 +523,12 @@ static unsigned long trbe_get_trace_size(struct perf_output_handle *handle,
520523
else
521524
write = get_trbe_write_pointer();
522525

523-
end_off = write - get_trbe_base_pointer();
526+
/*
527+
* TRBE may use a different base address than the base
528+
* of the ring buffer. Thus use the beginning of the ring
529+
* buffer to compute the offsets.
530+
*/
531+
end_off = write - buf->trbe_base;
524532
start_off = PERF_IDX2OFF(handle->head, buf);
525533

526534
if (WARN_ON_ONCE(end_off < start_off))
@@ -678,6 +686,8 @@ static int __arm_trbe_enable(struct trbe_buf *buf,
678686
trbe_stop_and_truncate_event(handle);
679687
return -ENOSPC;
680688
}
689+
/* Set the base of the TRBE to the buffer base */
690+
buf->trbe_hw_base = buf->trbe_base;
681691
*this_cpu_ptr(buf->cpudata->drvdata->handle) = handle;
682692
trbe_enable_hw(buf);
683693
return 0;
@@ -771,7 +781,7 @@ static bool is_perf_trbe(struct perf_output_handle *handle)
771781
struct trbe_drvdata *drvdata = cpudata->drvdata;
772782
int cpu = smp_processor_id();
773783

774-
WARN_ON(buf->trbe_base != get_trbe_base_pointer());
784+
WARN_ON(buf->trbe_hw_base != get_trbe_base_pointer());
775785
WARN_ON(buf->trbe_limit != get_trbe_limit_pointer());
776786

777787
if (cpudata->mode != CS_MODE_PERF)

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