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ia64: remove stale paravirt leftovers
Remove the last leftovers from IA64 Xen pv-guest support. PARAVIRT is long gone from IA64 Kconfig and Xen IA64 support, too. Due to lack of infrastructure no testing done. Signed-off-by: Juergen Gross <[email protected]> Signed-off-by: Tony Luck <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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4 files changed

+34
-77
lines changed

4 files changed

+34
-77
lines changed

‎arch/ia64/include/asm/irqflags.h

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -36,11 +36,7 @@ static inline void arch_maybe_save_ip(unsigned long flags)
3636
static inline unsigned long arch_local_save_flags(void)
3737
{
3838
ia64_stop();
39-
#ifdef CONFIG_PARAVIRT
40-
return ia64_get_psr_i();
41-
#else
4239
return ia64_getreg(_IA64_REG_PSR);
43-
#endif
4440
}
4541

4642
static inline unsigned long arch_local_irq_save(void)

‎arch/ia64/include/uapi/asm/gcc_intrin.h

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ extern void ia64_bad_param_for_setreg (void);
3131
extern void ia64_bad_param_for_getreg (void);
3232

3333

34-
#define ia64_native_setreg(regnum, val) \
34+
#define ia64_setreg(regnum, val) \
3535
({ \
3636
switch (regnum) { \
3737
case _IA64_REG_PSR_L: \
@@ -60,7 +60,7 @@ extern void ia64_bad_param_for_getreg (void);
6060
} \
6161
})
6262

63-
#define ia64_native_getreg(regnum) \
63+
#define ia64_getreg(regnum) \
6464
({ \
6565
__u64 ia64_intri_res; \
6666
\
@@ -384,7 +384,7 @@ extern void ia64_bad_param_for_getreg (void);
384384

385385
#define ia64_invala() asm volatile ("invala" ::: "memory")
386386

387-
#define ia64_native_thash(addr) \
387+
#define ia64_thash(addr) \
388388
({ \
389389
unsigned long ia64_intri_res; \
390390
asm volatile ("thash %0=%1" : "=r"(ia64_intri_res) : "r" (addr)); \
@@ -437,10 +437,10 @@ extern void ia64_bad_param_for_getreg (void);
437437
#define ia64_set_pmd(index, val) \
438438
asm volatile ("mov pmd[%0]=%1" :: "r"(index), "r"(val) : "memory")
439439

440-
#define ia64_native_set_rr(index, val) \
440+
#define ia64_set_rr(index, val) \
441441
asm volatile ("mov rr[%0]=%1" :: "r"(index), "r"(val) : "memory");
442442

443-
#define ia64_native_get_cpuid(index) \
443+
#define ia64_get_cpuid(index) \
444444
({ \
445445
unsigned long ia64_intri_res; \
446446
asm volatile ("mov %0=cpuid[%r1]" : "=r"(ia64_intri_res) : "rO"(index)); \
@@ -476,33 +476,33 @@ extern void ia64_bad_param_for_getreg (void);
476476
})
477477

478478

479-
#define ia64_native_get_pmd(index) \
479+
#define ia64_get_pmd(index) \
480480
({ \
481481
unsigned long ia64_intri_res; \
482482
asm volatile ("mov %0=pmd[%1]" : "=r"(ia64_intri_res) : "r"(index)); \
483483
ia64_intri_res; \
484484
})
485485

486-
#define ia64_native_get_rr(index) \
486+
#define ia64_get_rr(index) \
487487
({ \
488488
unsigned long ia64_intri_res; \
489489
asm volatile ("mov %0=rr[%1]" : "=r"(ia64_intri_res) : "r" (index)); \
490490
ia64_intri_res; \
491491
})
492492

493-
#define ia64_native_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
493+
#define ia64_fc(addr) asm volatile ("fc %0" :: "r"(addr) : "memory")
494494

495495

496496
#define ia64_sync_i() asm volatile (";; sync.i" ::: "memory")
497497

498-
#define ia64_native_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
499-
#define ia64_native_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
498+
#define ia64_ssm(mask) asm volatile ("ssm %0":: "i"((mask)) : "memory")
499+
#define ia64_rsm(mask) asm volatile ("rsm %0":: "i"((mask)) : "memory")
500500
#define ia64_sum(mask) asm volatile ("sum %0":: "i"((mask)) : "memory")
501501
#define ia64_rum(mask) asm volatile ("rum %0":: "i"((mask)) : "memory")
502502

503503
#define ia64_ptce(addr) asm volatile ("ptc.e %0" :: "r"(addr))
504504

505-
#define ia64_native_ptcga(addr, size) \
505+
#define ia64_ptcga(addr, size) \
506506
do { \
507507
asm volatile ("ptc.ga %0,%1" :: "r"(addr), "r"(size) : "memory"); \
508508
ia64_dv_serialize_data(); \
@@ -607,7 +607,7 @@ do { \
607607
} \
608608
})
609609

610-
#define ia64_native_intrin_local_irq_restore(x) \
610+
#define ia64_intrin_local_irq_restore(x) \
611611
do { \
612612
asm volatile (";; cmp.ne p6,p7=%0,r0;;" \
613613
"(p6) ssm psr.i;" \

‎arch/ia64/include/uapi/asm/intel_intrin.h

Lines changed: 16 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -17,8 +17,8 @@
1717
* intrinsic
1818
*/
1919

20-
#define ia64_native_getreg __getReg
21-
#define ia64_native_setreg __setReg
20+
#define ia64_getreg __getReg
21+
#define ia64_setreg __setReg
2222

2323
#define ia64_hint __hint
2424
#define ia64_hint_pause __hint_pause
@@ -40,10 +40,10 @@
4040
#define ia64_invala_fr __invala_fr
4141
#define ia64_nop __nop
4242
#define ia64_sum __sum
43-
#define ia64_native_ssm __ssm
43+
#define ia64_ssm __ssm
4444
#define ia64_rum __rum
45-
#define ia64_native_rsm __rsm
46-
#define ia64_native_fc __fc
45+
#define ia64_rsm __rsm
46+
#define ia64_fc __fc
4747

4848
#define ia64_ldfs __ldfs
4949
#define ia64_ldfd __ldfd
@@ -89,17 +89,17 @@
8989
__setIndReg(_IA64_REG_INDR_PMC, index, val)
9090
#define ia64_set_pmd(index, val) \
9191
__setIndReg(_IA64_REG_INDR_PMD, index, val)
92-
#define ia64_native_set_rr(index, val) \
92+
#define ia64_set_rr(index, val) \
9393
__setIndReg(_IA64_REG_INDR_RR, index, val)
9494

95-
#define ia64_native_get_cpuid(index) \
95+
#define ia64_get_cpuid(index) \
9696
__getIndReg(_IA64_REG_INDR_CPUID, index)
9797
#define __ia64_get_dbr(index) __getIndReg(_IA64_REG_INDR_DBR, index)
9898
#define ia64_get_ibr(index) __getIndReg(_IA64_REG_INDR_IBR, index)
9999
#define ia64_get_pkr(index) __getIndReg(_IA64_REG_INDR_PKR, index)
100100
#define ia64_get_pmc(index) __getIndReg(_IA64_REG_INDR_PMC, index)
101-
#define ia64_native_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index)
102-
#define ia64_native_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index)
101+
#define ia64_get_pmd(index) __getIndReg(_IA64_REG_INDR_PMD, index)
102+
#define ia64_get_rr(index) __getIndReg(_IA64_REG_INDR_RR, index)
103103

104104
#define ia64_srlz_d __dsrlz
105105
#define ia64_srlz_i __isrlz
@@ -121,16 +121,16 @@
121121
#define ia64_ld8_acq __ld8_acq
122122

123123
#define ia64_sync_i __synci
124-
#define ia64_native_thash __thash
125-
#define ia64_native_ttag __ttag
124+
#define ia64_thash __thash
125+
#define ia64_ttag __ttag
126126
#define ia64_itcd __itcd
127127
#define ia64_itci __itci
128128
#define ia64_itrd __itrd
129129
#define ia64_itri __itri
130130
#define ia64_ptce __ptce
131131
#define ia64_ptcl __ptcl
132-
#define ia64_native_ptcg __ptcg
133-
#define ia64_native_ptcga __ptcga
132+
#define ia64_ptcg __ptcg
133+
#define ia64_ptcga __ptcga
134134
#define ia64_ptri __ptri
135135
#define ia64_ptrd __ptrd
136136
#define ia64_dep_mi _m64_dep_mi
@@ -147,13 +147,13 @@
147147
#define ia64_lfetch_fault __lfetch_fault
148148
#define ia64_lfetch_fault_excl __lfetch_fault_excl
149149

150-
#define ia64_native_intrin_local_irq_restore(x) \
150+
#define ia64_intrin_local_irq_restore(x) \
151151
do { \
152152
if ((x) != 0) { \
153-
ia64_native_ssm(IA64_PSR_I); \
153+
ia64_ssm(IA64_PSR_I); \
154154
ia64_srlz_d(); \
155155
} else { \
156-
ia64_native_rsm(IA64_PSR_I); \
156+
ia64_rsm(IA64_PSR_I); \
157157
} \
158158
} while (0)
159159

‎arch/ia64/include/uapi/asm/intrinsics.h

Lines changed: 6 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -21,15 +21,13 @@
2121
#endif
2222
#include <asm/cmpxchg.h>
2323

24-
#define ia64_native_get_psr_i() (ia64_native_getreg(_IA64_REG_PSR) & IA64_PSR_I)
25-
26-
#define ia64_native_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
24+
#define ia64_set_rr0_to_rr4(val0, val1, val2, val3, val4) \
2725
do { \
28-
ia64_native_set_rr(0x0000000000000000UL, (val0)); \
29-
ia64_native_set_rr(0x2000000000000000UL, (val1)); \
30-
ia64_native_set_rr(0x4000000000000000UL, (val2)); \
31-
ia64_native_set_rr(0x6000000000000000UL, (val3)); \
32-
ia64_native_set_rr(0x8000000000000000UL, (val4)); \
26+
ia64_set_rr(0x0000000000000000UL, (val0)); \
27+
ia64_set_rr(0x2000000000000000UL, (val1)); \
28+
ia64_set_rr(0x4000000000000000UL, (val2)); \
29+
ia64_set_rr(0x6000000000000000UL, (val3)); \
30+
ia64_set_rr(0x8000000000000000UL, (val4)); \
3331
} while (0)
3432

3533
/*
@@ -85,41 +83,4 @@ extern unsigned long __bad_increment_for_ia64_fetch_and_add (void);
8583

8684
#endif
8785

88-
89-
#ifndef __ASSEMBLY__
90-
91-
#define IA64_INTRINSIC_API(name) ia64_native_ ## name
92-
#define IA64_INTRINSIC_MACRO(name) ia64_native_ ## name
93-
94-
95-
/************************************************/
96-
/* Instructions paravirtualized for correctness */
97-
/************************************************/
98-
/* fc, thash, get_cpuid, get_pmd, get_eflags, set_eflags */
99-
/* Note that "ttag" and "cover" are also privilege-sensitive; "ttag"
100-
* is not currently used (though it may be in a long-format VHPT system!)
101-
*/
102-
#define ia64_fc IA64_INTRINSIC_API(fc)
103-
#define ia64_thash IA64_INTRINSIC_API(thash)
104-
#define ia64_get_cpuid IA64_INTRINSIC_API(get_cpuid)
105-
#define ia64_get_pmd IA64_INTRINSIC_API(get_pmd)
106-
107-
108-
/************************************************/
109-
/* Instructions paravirtualized for performance */
110-
/************************************************/
111-
#define ia64_ssm IA64_INTRINSIC_MACRO(ssm)
112-
#define ia64_rsm IA64_INTRINSIC_MACRO(rsm)
113-
#define ia64_getreg IA64_INTRINSIC_MACRO(getreg)
114-
#define ia64_setreg IA64_INTRINSIC_API(setreg)
115-
#define ia64_set_rr IA64_INTRINSIC_API(set_rr)
116-
#define ia64_get_rr IA64_INTRINSIC_API(get_rr)
117-
#define ia64_ptcga IA64_INTRINSIC_API(ptcga)
118-
#define ia64_get_psr_i IA64_INTRINSIC_API(get_psr_i)
119-
#define ia64_intrin_local_irq_restore \
120-
IA64_INTRINSIC_API(intrin_local_irq_restore)
121-
#define ia64_set_rr0_to_rr4 IA64_INTRINSIC_API(set_rr0_to_rr4)
122-
123-
#endif /* !__ASSEMBLY__ */
124-
12586
#endif /* _UAPI_ASM_IA64_INTRINSICS_H */

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