Skip to content

Commit 245bbe8

Browse files
miquelraynalmiquelraynal
committed
Merge tag 'spi-nor/for-5.7' into mtd/next
SPI NOR core changes: - move all the manufacturer specific quirks/code out of the core, to make the core logic more readable and thus ease maintenance. - move the SFDP logic out of the core, it provides a better separation between the SFDP parsing and core logic. - trim what is exposed in spi-nor.h. The SPI NOR controllers drivers must not be able to use structures that are meant just for the SPI NOR core. - use the spi-mem direct mapping API to let advanced controllers optimize the read/write operations when they support direct mapping. - add generic formula for the Status Register block protection handling. It fixes some long standing locking limitations and eases the addition of the 4bit block protection support. - add block protection support for flashes with 4 block protection bits in the Status Register. SPI NOR controller drivers changes: - the mtk-quadspi driver is replaced by the new spi-mem spi-mtk-nor driver. Merge tag 'mtk-mtd-spi-move' into spi-nor/next to avoid conflicts.
2 parents 176538d + f3f2b7e commit 245bbe8

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

41 files changed

+7126
-6373
lines changed

‎Documentation/devicetree/bindings/mtd/mtk-quadspi.txt renamed to ‎Documentation/devicetree/bindings/spi/spi-mtk-nor.txt

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
* Serial NOR flash controller for MediaTek SoCs
1+
* Serial NOR flash controller for MediaTek ARM SoCs
22

33
Required properties:
44
- compatible: For mt8173, compatible should be "mediatek,mt8173-nor",
@@ -13,6 +13,7 @@ Required properties:
1313
"mediatek,mt7629-nor", "mediatek,mt8173-nor"
1414
"mediatek,mt8173-nor"
1515
- reg: physical base address and length of the controller's register
16+
- interrupts: Interrupt number used by the controller.
1617
- clocks: the phandle of the clocks needed by the nor controller
1718
- clock-names: the names of the clocks
1819
the clocks should be named "spi" and "sf". "spi" is used for spi bus,
@@ -22,20 +23,16 @@ Required properties:
2223
- #address-cells: should be <1>
2324
- #size-cells: should be <0>
2425

25-
The SPI flash must be a child of the nor_flash node and must have a
26-
compatible property. Also see jedec,spi-nor.txt.
27-
28-
Required properties:
29-
- compatible: May include a device-specific string consisting of the manufacturer
30-
and name of the chip. Must also include "jedec,spi-nor" for any
31-
SPI NOR flash that can be identified by the JEDEC READ ID opcode (0x9F).
32-
- reg : Chip-Select number
26+
There should be only one spi slave device following generic spi bindings.
27+
It's not recommended to use this controller for devices other than SPI NOR
28+
flash due to limited transfer capability of this controller.
3329

3430
Example:
3531

3632
nor_flash: spi@1100d000 {
3733
compatible = "mediatek,mt8173-nor";
3834
reg = <0 0x1100d000 0 0xe0>;
35+
interrupts = <&spi_flash_irq>;
3936
clocks = <&pericfg CLK_PERI_SPI>,
4037
<&topckgen CLK_TOP_SPINFI_IFR_SEL>;
4138
clock-names = "spi", "sf";

‎MAINTAINERS

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1928,7 +1928,7 @@ F: Documentation/devicetree/bindings/i2c/i2c-lpc2k.txt
19281928
F: arch/arm/boot/dts/lpc43*
19291929
F: drivers/i2c/busses/i2c-lpc2k.c
19301930
F: drivers/memory/pl172.c
1931-
F: drivers/mtd/spi-nor/nxp-spifi.c
1931+
F: drivers/mtd/spi-nor/controllers/nxp-spifi.c
19321932
F: drivers/rtc/rtc-lpc24xx.c
19331933
N: lpc18xx
19341934

‎drivers/mtd/spi-nor/Kconfig

Lines changed: 1 addition & 82 deletions
Original file line numberDiff line numberDiff line change
@@ -24,87 +24,6 @@ config MTD_SPI_NOR_USE_4K_SECTORS
2424
Please note that some tools/drivers/filesystems may not work with
2525
4096 B erase size (e.g. UBIFS requires 15 KiB as a minimum).
2626

27-
config SPI_ASPEED_SMC
28-
tristate "Aspeed flash controllers in SPI mode"
29-
depends on ARCH_ASPEED || COMPILE_TEST
30-
depends on HAS_IOMEM && OF
31-
help
32-
This enables support for the Firmware Memory controller (FMC)
33-
in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
34-
and support for the SPI flash memory controller (SPI) for
35-
the host firmware. The implementation only supports SPI NOR.
36-
37-
config SPI_CADENCE_QUADSPI
38-
tristate "Cadence Quad SPI controller"
39-
depends on OF && (ARM || ARM64 || COMPILE_TEST)
40-
help
41-
Enable support for the Cadence Quad SPI Flash controller.
42-
43-
Cadence QSPI is a specialized controller for connecting an SPI
44-
Flash over 1/2/4-bit wide bus. Enable this option if you have a
45-
device with a Cadence QSPI controller and want to access the
46-
Flash as an MTD device.
47-
48-
config SPI_HISI_SFC
49-
tristate "Hisilicon FMC SPI-NOR Flash Controller(SFC)"
50-
depends on ARCH_HISI || COMPILE_TEST
51-
depends on HAS_IOMEM
52-
help
53-
This enables support for HiSilicon FMC SPI-NOR flash controller.
54-
55-
config SPI_MTK_QUADSPI
56-
tristate "MediaTek Quad SPI controller"
57-
depends on HAS_IOMEM
58-
help
59-
This enables support for the Quad SPI controller in master mode.
60-
This controller does not support generic SPI. It only supports
61-
SPI NOR.
62-
63-
config SPI_NXP_SPIFI
64-
tristate "NXP SPI Flash Interface (SPIFI)"
65-
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
66-
depends on HAS_IOMEM
67-
help
68-
Enable support for the NXP LPC SPI Flash Interface controller.
69-
70-
SPIFI is a specialized controller for connecting serial SPI
71-
Flash. Enable this option if you have a device with a SPIFI
72-
controller and want to access the Flash as a mtd device.
73-
74-
config SPI_INTEL_SPI
75-
tristate
76-
77-
config SPI_INTEL_SPI_PCI
78-
tristate "Intel PCH/PCU SPI flash PCI driver (DANGEROUS)"
79-
depends on X86 && PCI
80-
select SPI_INTEL_SPI
81-
help
82-
This enables PCI support for the Intel PCH/PCU SPI controller in
83-
master mode. This controller is present in modern Intel hardware
84-
and is used to hold BIOS and other persistent settings. Using
85-
this driver it is possible to upgrade BIOS directly from Linux.
86-
87-
Say N here unless you know what you are doing. Overwriting the
88-
SPI flash may render the system unbootable.
89-
90-
To compile this driver as a module, choose M here: the module
91-
will be called intel-spi-pci.
92-
93-
config SPI_INTEL_SPI_PLATFORM
94-
tristate "Intel PCH/PCU SPI flash platform driver (DANGEROUS)"
95-
depends on X86
96-
select SPI_INTEL_SPI
97-
help
98-
This enables platform support for the Intel PCH/PCU SPI
99-
controller in master mode. This controller is present in modern
100-
Intel hardware and is used to hold BIOS and other persistent
101-
settings. Using this driver it is possible to upgrade BIOS
102-
directly from Linux.
103-
104-
Say N here unless you know what you are doing. Overwriting the
105-
SPI flash may render the system unbootable.
106-
107-
To compile this driver as a module, choose M here: the module
108-
will be called intel-spi-platform.
27+
source "drivers/mtd/spi-nor/controllers/Kconfig"
10928

11029
endif # MTD_SPI_NOR

‎drivers/mtd/spi-nor/Makefile

Lines changed: 18 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,20 @@
11
# SPDX-License-Identifier: GPL-2.0
2+
3+
spi-nor-objs := core.o sfdp.o
4+
spi-nor-objs += atmel.o
5+
spi-nor-objs += catalyst.o
6+
spi-nor-objs += eon.o
7+
spi-nor-objs += esmt.o
8+
spi-nor-objs += everspin.o
9+
spi-nor-objs += fujitsu.o
10+
spi-nor-objs += gigadevice.o
11+
spi-nor-objs += intel.o
12+
spi-nor-objs += issi.o
13+
spi-nor-objs += macronix.o
14+
spi-nor-objs += micron-st.o
15+
spi-nor-objs += spansion.o
16+
spi-nor-objs += sst.o
17+
spi-nor-objs += winbond.o
18+
spi-nor-objs += xilinx.o
19+
spi-nor-objs += xmc.o
220
obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o
3-
obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
4-
obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o
5-
obj-$(CONFIG_SPI_HISI_SFC) += hisi-sfc.o
6-
obj-$(CONFIG_SPI_MTK_QUADSPI) += mtk-quadspi.o
7-
obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o
8-
obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o
9-
obj-$(CONFIG_SPI_INTEL_SPI_PCI) += intel-spi-pci.o
10-
obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o

‎drivers/mtd/spi-nor/atmel.c

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
// SPDX-License-Identifier: GPL-2.0
2+
/*
3+
* Copyright (C) 2005, Intec Automation Inc.
4+
* Copyright (C) 2014, Freescale Semiconductor, Inc.
5+
*/
6+
7+
#include <linux/mtd/spi-nor.h>
8+
9+
#include "core.h"
10+
11+
static const struct flash_info atmel_parts[] = {
12+
/* Atmel -- some are (confusingly) marketed as "DataFlash" */
13+
{ "at25fs010", INFO(0x1f6601, 0, 32 * 1024, 4, SECT_4K) },
14+
{ "at25fs040", INFO(0x1f6604, 0, 64 * 1024, 8, SECT_4K) },
15+
16+
{ "at25df041a", INFO(0x1f4401, 0, 64 * 1024, 8, SECT_4K) },
17+
{ "at25df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
18+
{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) },
19+
{ "at25df641", INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K) },
20+
21+
{ "at25sl321", INFO(0x1f4216, 0, 64 * 1024, 64,
22+
SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
23+
24+
{ "at26f004", INFO(0x1f0400, 0, 64 * 1024, 8, SECT_4K) },
25+
{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K) },
26+
{ "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) },
27+
{ "at26df321", INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K) },
28+
29+
{ "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16, SECT_4K) },
30+
};
31+
32+
static void atmel_default_init(struct spi_nor *nor)
33+
{
34+
nor->flags |= SNOR_F_HAS_LOCK;
35+
}
36+
37+
static const struct spi_nor_fixups atmel_fixups = {
38+
.default_init = atmel_default_init,
39+
};
40+
41+
const struct spi_nor_manufacturer spi_nor_atmel = {
42+
.name = "atmel",
43+
.parts = atmel_parts,
44+
.nparts = ARRAY_SIZE(atmel_parts),
45+
.fixups = &atmel_fixups,
46+
};

‎drivers/mtd/spi-nor/catalyst.c

Lines changed: 29 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,29 @@
1+
// SPDX-License-Identifier: GPL-2.0
2+
/*
3+
* Copyright (C) 2005, Intec Automation Inc.
4+
* Copyright (C) 2014, Freescale Semiconductor, Inc.
5+
*/
6+
7+
#include <linux/mtd/spi-nor.h>
8+
9+
#include "core.h"
10+
11+
static const struct flash_info catalyst_parts[] = {
12+
/* Catalyst / On Semiconductor -- non-JEDEC */
13+
{ "cat25c11", CAT25_INFO(16, 8, 16, 1,
14+
SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
15+
{ "cat25c03", CAT25_INFO(32, 8, 16, 2,
16+
SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
17+
{ "cat25c09", CAT25_INFO(128, 8, 32, 2,
18+
SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
19+
{ "cat25c17", CAT25_INFO(256, 8, 32, 2,
20+
SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
21+
{ "cat25128", CAT25_INFO(2048, 8, 64, 2,
22+
SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
23+
};
24+
25+
const struct spi_nor_manufacturer spi_nor_catalyst = {
26+
.name = "catalyst",
27+
.parts = catalyst_parts,
28+
.nparts = ARRAY_SIZE(catalyst_parts),
29+
};

‎drivers/mtd/spi-nor/controllers/Kconfig

Lines changed: 75 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,75 @@
1+
# SPDX-License-Identifier: GPL-2.0-only
2+
config SPI_ASPEED_SMC
3+
tristate "Aspeed flash controllers in SPI mode"
4+
depends on ARCH_ASPEED || COMPILE_TEST
5+
depends on HAS_IOMEM && OF
6+
help
7+
This enables support for the Firmware Memory controller (FMC)
8+
in the Aspeed AST2500/AST2400 SoCs when attached to SPI NOR chips,
9+
and support for the SPI flash memory controller (SPI) for
10+
the host firmware. The implementation only supports SPI NOR.
11+
12+
config SPI_CADENCE_QUADSPI
13+
tristate "Cadence Quad SPI controller"
14+
depends on OF && (ARM || ARM64 || COMPILE_TEST)
15+
help
16+
Enable support for the Cadence Quad SPI Flash controller.
17+
18+
Cadence QSPI is a specialized controller for connecting an SPI
19+
Flash over 1/2/4-bit wide bus. Enable this option if you have a
20+
device with a Cadence QSPI controller and want to access the
21+
Flash as an MTD device.
22+
23+
config SPI_HISI_SFC
24+
tristate "Hisilicon FMC SPI-NOR Flash Controller(SFC)"
25+
depends on ARCH_HISI || COMPILE_TEST
26+
depends on HAS_IOMEM
27+
help
28+
This enables support for HiSilicon FMC SPI-NOR flash controller.
29+
30+
config SPI_NXP_SPIFI
31+
tristate "NXP SPI Flash Interface (SPIFI)"
32+
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
33+
depends on HAS_IOMEM
34+
help
35+
Enable support for the NXP LPC SPI Flash Interface controller.
36+
37+
SPIFI is a specialized controller for connecting serial SPI
38+
Flash. Enable this option if you have a device with a SPIFI
39+
controller and want to access the Flash as a mtd device.
40+
41+
config SPI_INTEL_SPI
42+
tristate
43+
44+
config SPI_INTEL_SPI_PCI
45+
tristate "Intel PCH/PCU SPI flash PCI driver (DANGEROUS)"
46+
depends on X86 && PCI
47+
select SPI_INTEL_SPI
48+
help
49+
This enables PCI support for the Intel PCH/PCU SPI controller in
50+
master mode. This controller is present in modern Intel hardware
51+
and is used to hold BIOS and other persistent settings. Using
52+
this driver it is possible to upgrade BIOS directly from Linux.
53+
54+
Say N here unless you know what you are doing. Overwriting the
55+
SPI flash may render the system unbootable.
56+
57+
To compile this driver as a module, choose M here: the module
58+
will be called intel-spi-pci.
59+
60+
config SPI_INTEL_SPI_PLATFORM
61+
tristate "Intel PCH/PCU SPI flash platform driver (DANGEROUS)"
62+
depends on X86
63+
select SPI_INTEL_SPI
64+
help
65+
This enables platform support for the Intel PCH/PCU SPI
66+
controller in master mode. This controller is present in modern
67+
Intel hardware and is used to hold BIOS and other persistent
68+
settings. Using this driver it is possible to upgrade BIOS
69+
directly from Linux.
70+
71+
Say N here unless you know what you are doing. Overwriting the
72+
SPI flash may render the system unbootable.
73+
74+
To compile this driver as a module, choose M here: the module
75+
will be called intel-spi-platform.

‎drivers/mtd/spi-nor/controllers/Makefile

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
# SPDX-License-Identifier: GPL-2.0
2+
obj-$(CONFIG_SPI_ASPEED_SMC) += aspeed-smc.o
3+
obj-$(CONFIG_SPI_CADENCE_QUADSPI) += cadence-quadspi.o
4+
obj-$(CONFIG_SPI_HISI_SFC) += hisi-sfc.o
5+
obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o
6+
obj-$(CONFIG_SPI_INTEL_SPI) += intel-spi.o
7+
obj-$(CONFIG_SPI_INTEL_SPI_PCI) += intel-spi-pci.o
8+
obj-$(CONFIG_SPI_INTEL_SPI_PLATFORM) += intel-spi-platform.o

‎drivers/mtd/spi-nor/aspeed-smc.c renamed to ‎drivers/mtd/spi-nor/controllers/aspeed-smc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,7 @@ struct aspeed_smc_controller {
109109
void __iomem *ahb_base; /* per-chip windows resource */
110110
u32 ahb_window_size; /* full mapping window size */
111111

112-
struct aspeed_smc_chip *chips[0]; /* pointers to attached chips */
112+
struct aspeed_smc_chip *chips[]; /* pointers to attached chips */
113113
};
114114

115115
/*

‎drivers/mtd/spi-nor/cadence-quadspi.c renamed to ‎drivers/mtd/spi-nor/controllers/cadence-quadspi.c

File renamed without changes.

0 commit comments

Comments
 (0)