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Merge tag 'mtd/for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal: "MTD changes: - No particularly important patchset this cycle, but we have a few usual improvements: like using a better/more recent helper or checking a return value. Raw NAND changes: - The use of for_each_child_of_node_scoped() has been spread into the subsystem drivers - a couple of exit path have been fixed (mtk, denali) - TI GPMC bindings have been enhanced to comply with up-to-date partition descriptions - a load of small and misc fixes SPI-NAND changes: - The most impacting series this cycle is bringing support for continuous reads in the SPI-NAND subsystem. This is a feature already merged in the raw NAND subsystem which allows optimizing the internal fetch times in the chip while reading sequential pages within an eraseblock. For now only Macronix NANDs benefit from this feature. While we are talking about Macronix, some of their chip need an explicit action for selecting a different plane, and support for it has also been brought. - The bitflip threshold has also been set to the same arbitrary level as in the raw NAND subsystem to optimize wear leveling decisions - Add upport for a new Winbond chip SPI NOR changes: - Add Write Protect support for N25Q064A. - New flash support for Zetta ZD25Q128C and Spansion S28HS256T. - Fix a NULL dereference in probe path for flashes without a name. The probe path tries to access the name without checking its existence first. S28HS256T is the first flash to define its entry without a name, uncovering this issue" * tag 'mtd/for-6.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (41 commits) mtd: spi-nor: fix flash probing mtd: spi-nor: spansion: Add support for S28HS256T mtd: spi-nor: winbond: add Zetta ZD25Q128C support mtd: spi-nor: micron-st: Add n25q064a WP support mtd: spi-nor: sst: Factor out common write operation to `sst_nor_write_data()` mtd: spinand: macronix: Flag parts needing explicit plane select mtd: spinand: Add support for setting plane select bits dt-bindings: mtd: ti, gpmc-nand: support partitions node mtd: rawnand: mtk: Fix init error path mtd: powernv: Add check devm_kasprintf() returned value mtd: rawnand: mtk: Factorize out the logic cleaning mtk chips mtd: rawnand: atmel: Add message on DMA usage mtd: rawnand: meson: Fix typo in function name mtd: spi-nand: macronix: Continuous read support mtd: spi-nand: macronix: Add a possible bitflip status flag mtd: spi-nand: macronix: Extract the bitflip retrieval logic mtd: spi-nand: macronix: Fix helper name mtd: spi-nand: Expose spinand_write_reg_op() mtd: spi-nand: Add continuous read support mtd: spi-nand: Isolate the MTD read logic in a helper ...
2 parents 288cb34 + 869acb8 commit 2471d2b

32 files changed

+621
-314
lines changed

‎Documentation/devicetree/bindings/mtd/ti,gpmc-nand.yaml

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -61,12 +61,9 @@ properties:
6161
GPIO connection to R/B signal from NAND chip
6262
maxItems: 1
6363

64-
patternProperties:
65-
"@[0-9a-f]+$":
66-
$ref: /schemas/mtd/partitions/partition.yaml
67-
6864
allOf:
6965
- $ref: /schemas/memory-controllers/ti,gpmc-child.yaml
66+
- $ref: mtd.yaml#
7067

7168
required:
7269
- compatible

‎drivers/mtd/devices/powernv_flash.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -207,6 +207,9 @@ static int powernv_flash_set_driver_info(struct device *dev,
207207
* get them
208208
*/
209209
mtd->name = devm_kasprintf(dev, GFP_KERNEL, "%pOFP", dev->of_node);
210+
if (!mtd->name)
211+
return -ENOMEM;
212+
210213
mtd->type = MTD_NORFLASH;
211214
mtd->flags = MTD_WRITEABLE;
212215
mtd->size = size;

‎drivers/mtd/devices/slram.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -296,10 +296,12 @@ static int __init init_slram(void)
296296
T("slram: devname = %s\n", devname);
297297
if ((!map) || (!(devstart = strsep(&map, ",")))) {
298298
E("slram: No devicestart specified.\n");
299+
break;
299300
}
300301
T("slram: devstart = %s\n", devstart);
301302
if ((!map) || (!(devlength = strsep(&map, ",")))) {
302303
E("slram: No devicelength / -end specified.\n");
304+
break;
303305
}
304306
T("slram: devlength = %s\n", devlength);
305307
if (parse_cmdline(devname, devstart, devlength) != 0) {

‎drivers/mtd/mtdconcat.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -204,7 +204,7 @@ concat_writev(struct mtd_info *mtd, const struct kvec *vecs,
204204
}
205205

206206
/* make a copy of vecs */
207-
vecs_copy = kmemdup(vecs, sizeof(struct kvec) * count, GFP_KERNEL);
207+
vecs_copy = kmemdup_array(vecs, count, sizeof(struct kvec), GFP_KERNEL);
208208
if (!vecs_copy)
209209
return -ENOMEM;
210210

‎drivers/mtd/nand/raw/arasan-nand-controller.c

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1360,7 +1360,7 @@ static void anfc_chips_cleanup(struct arasan_nfc *nfc)
13601360

13611361
static int anfc_chips_init(struct arasan_nfc *nfc)
13621362
{
1363-
struct device_node *np = nfc->dev->of_node, *nand_np;
1363+
struct device_node *np = nfc->dev->of_node;
13641364
int nchips = of_get_child_count(np);
13651365
int ret;
13661366

@@ -1370,10 +1370,9 @@ static int anfc_chips_init(struct arasan_nfc *nfc)
13701370
return -EINVAL;
13711371
}
13721372

1373-
for_each_child_of_node(np, nand_np) {
1373+
for_each_child_of_node_scoped(np, nand_np) {
13741374
ret = anfc_chip_init(nfc, nand_np);
13751375
if (ret) {
1376-
of_node_put(nand_np);
13771376
anfc_chips_cleanup(nfc);
13781377
break;
13791378
}

‎drivers/mtd/nand/raw/atmel/nand-controller.c

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2049,7 +2049,10 @@ static int atmel_nand_controller_init(struct atmel_nand_controller *nc,
20492049
dma_cap_set(DMA_MEMCPY, mask);
20502050

20512051
nc->dmac = dma_request_channel(mask, NULL, NULL);
2052-
if (!nc->dmac)
2052+
if (nc->dmac)
2053+
dev_info(nc->dev, "using %s for DMA transfers\n",
2054+
dma_chan_name(nc->dmac));
2055+
else
20532056
dev_err(nc->dev, "Failed to request DMA channel\n");
20542057
}
20552058

‎drivers/mtd/nand/raw/cadence-nand-controller.c

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -2836,7 +2836,6 @@ static void cadence_nand_chips_cleanup(struct cdns_nand_ctrl *cdns_ctrl)
28362836
static int cadence_nand_chips_init(struct cdns_nand_ctrl *cdns_ctrl)
28372837
{
28382838
struct device_node *np = cdns_ctrl->dev->of_node;
2839-
struct device_node *nand_np;
28402839
int max_cs = cdns_ctrl->caps2.max_banks;
28412840
int nchips, ret;
28422841

@@ -2849,10 +2848,9 @@ static int cadence_nand_chips_init(struct cdns_nand_ctrl *cdns_ctrl)
28492848
return -EINVAL;
28502849
}
28512850

2852-
for_each_child_of_node(np, nand_np) {
2851+
for_each_child_of_node_scoped(np, nand_np) {
28532852
ret = cadence_nand_chip_init(cdns_ctrl, nand_np);
28542853
if (ret) {
2855-
of_node_put(nand_np);
28562854
cadence_nand_chips_cleanup(cdns_ctrl);
28572855
return ret;
28582856
}

‎drivers/mtd/nand/raw/davinci_nand.c

Lines changed: 65 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,8 +20,71 @@
2020
#include <linux/slab.h>
2121
#include <linux/of.h>
2222

23-
#include <linux/platform_data/mtd-davinci.h>
24-
#include <linux/platform_data/mtd-davinci-aemif.h>
23+
#define NRCSR_OFFSET 0x00
24+
#define NANDFCR_OFFSET 0x60
25+
#define NANDFSR_OFFSET 0x64
26+
#define NANDF1ECC_OFFSET 0x70
27+
28+
/* 4-bit ECC syndrome registers */
29+
#define NAND_4BIT_ECC_LOAD_OFFSET 0xbc
30+
#define NAND_4BIT_ECC1_OFFSET 0xc0
31+
#define NAND_4BIT_ECC2_OFFSET 0xc4
32+
#define NAND_4BIT_ECC3_OFFSET 0xc8
33+
#define NAND_4BIT_ECC4_OFFSET 0xcc
34+
#define NAND_ERR_ADD1_OFFSET 0xd0
35+
#define NAND_ERR_ADD2_OFFSET 0xd4
36+
#define NAND_ERR_ERRVAL1_OFFSET 0xd8
37+
#define NAND_ERR_ERRVAL2_OFFSET 0xdc
38+
39+
/* NOTE: boards don't need to use these address bits
40+
* for ALE/CLE unless they support booting from NAND.
41+
* They're used unless platform data overrides them.
42+
*/
43+
#define MASK_ALE 0x08
44+
#define MASK_CLE 0x10
45+
46+
struct davinci_nand_pdata {
47+
uint32_t mask_ale;
48+
uint32_t mask_cle;
49+
50+
/*
51+
* 0-indexed chip-select number of the asynchronous
52+
* interface to which the NAND device has been connected.
53+
*
54+
* So, if you have NAND connected to CS3 of DA850, you
55+
* will pass '1' here. Since the asynchronous interface
56+
* on DA850 starts from CS2.
57+
*/
58+
uint32_t core_chipsel;
59+
60+
/* for packages using two chipselects */
61+
uint32_t mask_chipsel;
62+
63+
/* board's default static partition info */
64+
struct mtd_partition *parts;
65+
unsigned int nr_parts;
66+
67+
/* none == NAND_ECC_ENGINE_TYPE_NONE (strongly *not* advised!!)
68+
* soft == NAND_ECC_ENGINE_TYPE_SOFT
69+
* else == NAND_ECC_ENGINE_TYPE_ON_HOST, according to ecc_bits
70+
*
71+
* All DaVinci-family chips support 1-bit hardware ECC.
72+
* Newer ones also support 4-bit ECC, but are awkward
73+
* using it with large page chips.
74+
*/
75+
enum nand_ecc_engine_type engine_type;
76+
enum nand_ecc_placement ecc_placement;
77+
u8 ecc_bits;
78+
79+
/* e.g. NAND_BUSWIDTH_16 */
80+
unsigned int options;
81+
/* e.g. NAND_BBT_USE_FLASH */
82+
unsigned int bbt_options;
83+
84+
/* Main and mirror bbt descriptor overrides */
85+
struct nand_bbt_descr *bbt_td;
86+
struct nand_bbt_descr *bbt_md;
87+
};
2588

2689
/*
2790
* This is a device driver for the NAND flash controller found on the
@@ -54,8 +117,6 @@ struct davinci_nand_info {
54117
uint32_t mask_cle;
55118

56119
uint32_t core_chipsel;
57-
58-
struct davinci_aemif_timing *timing;
59120
};
60121

61122
static DEFINE_SPINLOCK(davinci_nand_lock);
@@ -775,7 +836,6 @@ static int nand_davinci_probe(struct platform_device *pdev)
775836
info->chip.options = pdata->options;
776837
info->chip.bbt_td = pdata->bbt_td;
777838
info->chip.bbt_md = pdata->bbt_md;
778-
info->timing = pdata->timing;
779839

780840
info->current_cs = info->vaddr;
781841
info->core_chipsel = pdata->core_chipsel;

‎drivers/mtd/nand/raw/denali_dt.c

Lines changed: 4 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -145,15 +145,15 @@ static int denali_dt_probe(struct platform_device *pdev)
145145
if (IS_ERR(denali->host))
146146
return PTR_ERR(denali->host);
147147

148-
dt->clk = devm_clk_get(dev, "nand");
148+
dt->clk = devm_clk_get_enabled(dev, "nand");
149149
if (IS_ERR(dt->clk))
150150
return PTR_ERR(dt->clk);
151151

152-
dt->clk_x = devm_clk_get(dev, "nand_x");
152+
dt->clk_x = devm_clk_get_enabled(dev, "nand_x");
153153
if (IS_ERR(dt->clk_x))
154154
return PTR_ERR(dt->clk_x);
155155

156-
dt->clk_ecc = devm_clk_get(dev, "ecc");
156+
dt->clk_ecc = devm_clk_get_enabled(dev, "ecc");
157157
if (IS_ERR(dt->clk_ecc))
158158
return PTR_ERR(dt->clk_ecc);
159159

@@ -165,18 +165,6 @@ static int denali_dt_probe(struct platform_device *pdev)
165165
if (IS_ERR(dt->rst_reg))
166166
return PTR_ERR(dt->rst_reg);
167167

168-
ret = clk_prepare_enable(dt->clk);
169-
if (ret)
170-
return ret;
171-
172-
ret = clk_prepare_enable(dt->clk_x);
173-
if (ret)
174-
goto out_disable_clk;
175-
176-
ret = clk_prepare_enable(dt->clk_ecc);
177-
if (ret)
178-
goto out_disable_clk_x;
179-
180168
denali->clk_rate = clk_get_rate(dt->clk);
181169
denali->clk_x_rate = clk_get_rate(dt->clk_x);
182170

@@ -187,7 +175,7 @@ static int denali_dt_probe(struct platform_device *pdev)
187175
*/
188176
ret = reset_control_deassert(dt->rst_reg);
189177
if (ret)
190-
goto out_disable_clk_ecc;
178+
return ret;
191179

192180
ret = reset_control_deassert(dt->rst);
193181
if (ret)
@@ -222,12 +210,6 @@ static int denali_dt_probe(struct platform_device *pdev)
222210
reset_control_assert(dt->rst);
223211
out_assert_rst_reg:
224212
reset_control_assert(dt->rst_reg);
225-
out_disable_clk_ecc:
226-
clk_disable_unprepare(dt->clk_ecc);
227-
out_disable_clk_x:
228-
clk_disable_unprepare(dt->clk_x);
229-
out_disable_clk:
230-
clk_disable_unprepare(dt->clk);
231213

232214
return ret;
233215
}
@@ -239,9 +221,6 @@ static void denali_dt_remove(struct platform_device *pdev)
239221
denali_remove(&dt->controller);
240222
reset_control_assert(dt->rst);
241223
reset_control_assert(dt->rst_reg);
242-
clk_disable_unprepare(dt->clk_ecc);
243-
clk_disable_unprepare(dt->clk_x);
244-
clk_disable_unprepare(dt->clk);
245224
}
246225

247226
static struct platform_driver denali_dt_driver = {

‎drivers/mtd/nand/raw/denali_pci.c

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -77,18 +77,20 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
7777
denali->reg = devm_ioremap(denali->dev, csr_base, csr_len);
7878
if (!denali->reg) {
7979
dev_err(&dev->dev, "Spectra: Unable to remap memory region\n");
80-
return -ENOMEM;
80+
ret = -ENOMEM;
81+
goto regions_release;
8182
}
8283

8384
denali->host = devm_ioremap(denali->dev, mem_base, mem_len);
8485
if (!denali->host) {
8586
dev_err(&dev->dev, "Spectra: ioremap failed!");
86-
return -ENOMEM;
87+
ret = -ENOMEM;
88+
goto regions_release;
8789
}
8890

8991
ret = denali_init(denali);
9092
if (ret)
91-
return ret;
93+
goto regions_release;
9294

9395
nsels = denali->nbanks;
9496

@@ -116,13 +118,16 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
116118

117119
out_remove_denali:
118120
denali_remove(denali);
121+
regions_release:
122+
pci_release_regions(dev);
119123
return ret;
120124
}
121125

122126
static void denali_pci_remove(struct pci_dev *dev)
123127
{
124128
struct denali_controller *denali = pci_get_drvdata(dev);
125129

130+
pci_release_regions(dev);
126131
denali_remove(denali);
127132
}
128133

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