Skip to content

Commit 247a631

Browse files
popcornmixmripard
authored andcommitted
drm/vc4: crtc: Increase setup cost in core clock calculation to handle extreme reduced blanking
The formula that determines the core clock requirement based on pixel clock and blanking has been determined experimentally to minimise the clock while supporting all modes we've seen. A new reduced blanking mode (4kp60 at 533MHz rather than the standard 594MHz) has been seen that doesn't produce a high enough clock and results in "flip_done timed out" error. Increase the setup cost in the formula to make this work. The result is a reduced blanking mode increases by up to 7MHz while leaving the standard timing mode untouched Link: raspberrypi/linux#4446 Fixes: 16e1010 ("drm/vc4: Increase the core clock based on HVS load") Signed-off-by: Dom Cobley <[email protected]> Signed-off-by: Maxime Ripard <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
1 parent 7fa846b commit 247a631

File tree

1 file changed

+1
-1
lines changed

1 file changed

+1
-1
lines changed

drivers/gpu/drm/vc4/vc4_crtc.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -711,7 +711,7 @@ static int vc4_crtc_atomic_check(struct drm_crtc *crtc,
711711
struct vc4_encoder *vc4_encoder = to_vc4_encoder(encoder);
712712

713713
if (vc4_encoder->type == VC4_ENCODER_TYPE_HDMI0) {
714-
vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 1000,
714+
vc4_state->hvs_load = max(mode->clock * mode->hdisplay / mode->htotal + 8000,
715715
mode->clock * 9 / 10) * 1000;
716716
} else {
717717
vc4_state->hvs_load = mode->clock * 1000;

0 commit comments

Comments
 (0)