@@ -1159,7 +1159,6 @@ enum {
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SNBEP_PCI_QPI_PORT0_FILTER ,
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SNBEP_PCI_QPI_PORT1_FILTER ,
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BDX_PCI_QPI_PORT2_FILTER ,
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- HSWEP_PCI_PCU_3 ,
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};
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static int snbep_qpi_hw_config (struct intel_uncore_box * box , struct perf_event * event )
@@ -2857,22 +2856,33 @@ static struct intel_uncore_type *hswep_msr_uncores[] = {
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NULL ,
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};
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- void hswep_uncore_cpu_init (void )
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+ #define HSWEP_PCU_DID 0x2fc0
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+ #define HSWEP_PCU_CAPID4_OFFET 0x94
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+ #define hswep_get_chop (_cap ) (((_cap) >> 6) & 0x3)
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+
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+ static bool hswep_has_limit_sbox (unsigned int device )
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{
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- int pkg = boot_cpu_data .logical_proc_id ;
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+ struct pci_dev * dev = pci_get_device (PCI_VENDOR_ID_INTEL , device , NULL );
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+ u32 capid4 ;
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+
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+ if (!dev )
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+ return false;
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+
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+ pci_read_config_dword (dev , HSWEP_PCU_CAPID4_OFFET , & capid4 );
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+ if (!hswep_get_chop (capid4 ))
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+ return true;
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+ return false;
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+ }
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+
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+ void hswep_uncore_cpu_init (void )
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+ {
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if (hswep_uncore_cbox .num_boxes > boot_cpu_data .x86_max_cores )
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hswep_uncore_cbox .num_boxes = boot_cpu_data .x86_max_cores ;
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/* Detect 6-8 core systems with only two SBOXes */
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- if (uncore_extra_pci_dev [pkg ].dev [HSWEP_PCI_PCU_3 ]) {
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- u32 capid4 ;
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-
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- pci_read_config_dword (uncore_extra_pci_dev [pkg ].dev [HSWEP_PCI_PCU_3 ],
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- 0x94 , & capid4 );
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- if (((capid4 >> 6 ) & 0x3 ) == 0 )
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- hswep_uncore_sbox .num_boxes = 2 ;
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- }
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+ if (hswep_has_limit_sbox (HSWEP_PCU_DID ))
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+ hswep_uncore_sbox .num_boxes = 2 ;
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uncore_msr_uncores = hswep_msr_uncores ;
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}
@@ -3135,11 +3145,6 @@ static const struct pci_device_id hswep_uncore_pci_ids[] = {
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.driver_data = UNCORE_PCI_DEV_DATA (UNCORE_EXTRA_PCI_DEV ,
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SNBEP_PCI_QPI_PORT1_FILTER ),
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},
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- { /* PCU.3 (for Capability registers) */
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- PCI_DEVICE (PCI_VENDOR_ID_INTEL , 0x2fc0 ),
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- .driver_data = UNCORE_PCI_DEV_DATA (UNCORE_EXTRA_PCI_DEV ,
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- HSWEP_PCI_PCU_3 ),
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- },
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{ /* end: all zeroes */ }
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};
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@@ -3231,27 +3236,18 @@ static struct event_constraint bdx_uncore_pcu_constraints[] = {
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EVENT_CONSTRAINT_END
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};
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+ #define BDX_PCU_DID 0x6fc0
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+
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void bdx_uncore_cpu_init (void )
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{
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- int pkg = topology_phys_to_logical_pkg (boot_cpu_data .phys_proc_id );
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-
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if (bdx_uncore_cbox .num_boxes > boot_cpu_data .x86_max_cores )
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bdx_uncore_cbox .num_boxes = boot_cpu_data .x86_max_cores ;
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uncore_msr_uncores = bdx_msr_uncores ;
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- /* BDX-DE doesn't have SBOX */
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- if (boot_cpu_data .x86_model == 86 ) {
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- uncore_msr_uncores [BDX_MSR_UNCORE_SBOX ] = NULL ;
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/* Detect systems with no SBOXes */
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- } else if (uncore_extra_pci_dev [pkg ].dev [HSWEP_PCI_PCU_3 ]) {
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- struct pci_dev * pdev ;
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- u32 capid4 ;
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-
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- pdev = uncore_extra_pci_dev [pkg ].dev [HSWEP_PCI_PCU_3 ];
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- pci_read_config_dword (pdev , 0x94 , & capid4 );
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- if (((capid4 >> 6 ) & 0x3 ) == 0 )
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- bdx_msr_uncores [BDX_MSR_UNCORE_SBOX ] = NULL ;
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- }
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+ if ((boot_cpu_data .x86_model == 86 ) || hswep_has_limit_sbox (BDX_PCU_DID ))
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+ uncore_msr_uncores [BDX_MSR_UNCORE_SBOX ] = NULL ;
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+
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hswep_uncore_pcu .constraints = bdx_uncore_pcu_constraints ;
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}
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@@ -3472,11 +3468,6 @@ static const struct pci_device_id bdx_uncore_pci_ids[] = {
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.driver_data = UNCORE_PCI_DEV_DATA (UNCORE_EXTRA_PCI_DEV ,
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BDX_PCI_QPI_PORT2_FILTER ),
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},
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- { /* PCU.3 (for Capability registers) */
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- PCI_DEVICE (PCI_VENDOR_ID_INTEL , 0x6fc0 ),
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- .driver_data = UNCORE_PCI_DEV_DATA (UNCORE_EXTRA_PCI_DEV ,
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- HSWEP_PCI_PCU_3 ),
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- },
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{ /* end: all zeroes */ }
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};
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