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airliedairlied
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Merge tag 'drm-misc-fixes-2020-03-05' of git://anongit.freedesktop.org/drm/drm-misc into drm-fixes
Fixes for v5.6.rc5: - dma-buf fix memory leak - Fix resource id creation race in virtio. - Various mmap fixes. - Fix fence leak in ttm_buffer_object_transfer(). - Fixes for sun4i VI layer format support. - kirin: Revert "Fix for hikey620 display offset problem" Signed-off-by: Dave Airlie <[email protected]> From: Maarten Lankhorst <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 70b8ea1 + 1b79cfd commit 26398db

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12 files changed

+202
-75
lines changed

12 files changed

+202
-75
lines changed

‎drivers/dma-buf/dma-buf.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -108,6 +108,7 @@ static int dma_buf_release(struct inode *inode, struct file *file)
108108
dma_resv_fini(dmabuf->resv);
109109

110110
module_put(dmabuf->owner);
111+
kfree(dmabuf->name);
111112
kfree(dmabuf);
112113
return 0;
113114
}

‎drivers/gpu/drm/bridge/analogix/analogix-anx6345.c

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -210,8 +210,7 @@ static int anx6345_dp_link_training(struct anx6345 *anx6345)
210210
if (err)
211211
return err;
212212

213-
dpcd[0] = drm_dp_max_link_rate(anx6345->dpcd);
214-
dpcd[0] = drm_dp_link_rate_to_bw_code(dpcd[0]);
213+
dpcd[0] = dp_bw;
215214
err = regmap_write(anx6345->map[I2C_IDX_DPTX],
216215
SP_DP_MAIN_LINK_BW_SET_REG, dpcd[0]);
217216
if (err)

‎drivers/gpu/drm/drm_gem_shmem_helper.c

Lines changed: 11 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -254,11 +254,16 @@ static void *drm_gem_shmem_vmap_locked(struct drm_gem_shmem_object *shmem)
254254
if (ret)
255255
goto err_zero_use;
256256

257-
if (obj->import_attach)
257+
if (obj->import_attach) {
258258
shmem->vaddr = dma_buf_vmap(obj->import_attach->dmabuf);
259-
else
259+
} else {
260+
pgprot_t prot = PAGE_KERNEL;
261+
262+
if (!shmem->map_cached)
263+
prot = pgprot_writecombine(prot);
260264
shmem->vaddr = vmap(shmem->pages, obj->size >> PAGE_SHIFT,
261-
VM_MAP, pgprot_writecombine(PAGE_KERNEL));
265+
VM_MAP, prot);
266+
}
262267

263268
if (!shmem->vaddr) {
264269
DRM_DEBUG_KMS("Failed to vmap pages\n");
@@ -540,8 +545,9 @@ int drm_gem_shmem_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma)
540545
}
541546

542547
vma->vm_flags |= VM_MIXEDMAP | VM_DONTEXPAND;
543-
vma->vm_page_prot = pgprot_writecombine(vm_get_page_prot(vma->vm_flags));
544-
vma->vm_page_prot = pgprot_decrypted(vma->vm_page_prot);
548+
vma->vm_page_prot = vm_get_page_prot(vma->vm_flags);
549+
if (!shmem->map_cached)
550+
vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
545551
vma->vm_ops = &drm_gem_shmem_vm_ops;
546552

547553
return 0;

‎drivers/gpu/drm/hisilicon/kirin/kirin_ade_reg.h

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -83,7 +83,6 @@
8383
#define VSIZE_OFST 20
8484
#define LDI_INT_EN 0x741C
8585
#define FRAME_END_INT_EN_OFST 1
86-
#define UNDERFLOW_INT_EN_OFST 2
8786
#define LDI_CTRL 0x7420
8887
#define BPP_OFST 3
8988
#define DATA_GATE_EN BIT(2)

‎drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c

Lines changed: 0 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,6 @@ struct ade_hw_ctx {
4646
struct clk *media_noc_clk;
4747
struct clk *ade_pix_clk;
4848
struct reset_control *reset;
49-
struct work_struct display_reset_wq;
5049
bool power_on;
5150
int irq;
5251

@@ -136,7 +135,6 @@ static void ade_init(struct ade_hw_ctx *ctx)
136135
*/
137136
ade_update_bits(base + ADE_CTRL, FRM_END_START_OFST,
138137
FRM_END_START_MASK, REG_EFFECTIVE_IN_ADEEN_FRMEND);
139-
ade_update_bits(base + LDI_INT_EN, UNDERFLOW_INT_EN_OFST, MASK(1), 1);
140138
}
141139

142140
static bool ade_crtc_mode_fixup(struct drm_crtc *crtc,
@@ -304,17 +302,6 @@ static void ade_crtc_disable_vblank(struct drm_crtc *crtc)
304302
MASK(1), 0);
305303
}
306304

307-
static void drm_underflow_wq(struct work_struct *work)
308-
{
309-
struct ade_hw_ctx *ctx = container_of(work, struct ade_hw_ctx,
310-
display_reset_wq);
311-
struct drm_device *drm_dev = ctx->crtc->dev;
312-
struct drm_atomic_state *state;
313-
314-
state = drm_atomic_helper_suspend(drm_dev);
315-
drm_atomic_helper_resume(drm_dev, state);
316-
}
317-
318305
static irqreturn_t ade_irq_handler(int irq, void *data)
319306
{
320307
struct ade_hw_ctx *ctx = data;
@@ -331,12 +318,6 @@ static irqreturn_t ade_irq_handler(int irq, void *data)
331318
MASK(1), 1);
332319
drm_crtc_handle_vblank(crtc);
333320
}
334-
if (status & BIT(UNDERFLOW_INT_EN_OFST)) {
335-
ade_update_bits(base + LDI_INT_CLR, UNDERFLOW_INT_EN_OFST,
336-
MASK(1), 1);
337-
DRM_ERROR("LDI underflow!");
338-
schedule_work(&ctx->display_reset_wq);
339-
}
340321

341322
return IRQ_HANDLED;
342323
}
@@ -919,7 +900,6 @@ static void *ade_hw_ctx_alloc(struct platform_device *pdev,
919900
if (ret)
920901
return ERR_PTR(-EIO);
921902

922-
INIT_WORK(&ctx->display_reset_wq, drm_underflow_wq);
923903
ctx->crtc = crtc;
924904

925905
return ctx;

‎drivers/gpu/drm/panfrost/panfrost_mmu.c

Lines changed: 19 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -601,33 +601,27 @@ static irqreturn_t panfrost_mmu_irq_handler_thread(int irq, void *data)
601601
source_id = (fault_status >> 16);
602602

603603
/* Page fault only */
604-
if ((status & mask) == BIT(i)) {
605-
WARN_ON(exception_type < 0xC1 || exception_type > 0xC4);
606-
604+
ret = -1;
605+
if ((status & mask) == BIT(i) && (exception_type & 0xF8) == 0xC0)
607606
ret = panfrost_mmu_map_fault_addr(pfdev, i, addr);
608-
if (!ret) {
609-
mmu_write(pfdev, MMU_INT_CLEAR, BIT(i));
610-
status &= ~mask;
611-
continue;
612-
}
613-
}
614607

615-
/* terminal fault, print info about the fault */
616-
dev_err(pfdev->dev,
617-
"Unhandled Page fault in AS%d at VA 0x%016llX\n"
618-
"Reason: %s\n"
619-
"raw fault status: 0x%X\n"
620-
"decoded fault status: %s\n"
621-
"exception type 0x%X: %s\n"
622-
"access type 0x%X: %s\n"
623-
"source id 0x%X\n",
624-
i, addr,
625-
"TODO",
626-
fault_status,
627-
(fault_status & (1 << 10) ? "DECODER FAULT" : "SLAVE FAULT"),
628-
exception_type, panfrost_exception_name(pfdev, exception_type),
629-
access_type, access_type_name(pfdev, fault_status),
630-
source_id);
608+
if (ret)
609+
/* terminal fault, print info about the fault */
610+
dev_err(pfdev->dev,
611+
"Unhandled Page fault in AS%d at VA 0x%016llX\n"
612+
"Reason: %s\n"
613+
"raw fault status: 0x%X\n"
614+
"decoded fault status: %s\n"
615+
"exception type 0x%X: %s\n"
616+
"access type 0x%X: %s\n"
617+
"source id 0x%X\n",
618+
i, addr,
619+
"TODO",
620+
fault_status,
621+
(fault_status & (1 << 10) ? "DECODER FAULT" : "SLAVE FAULT"),
622+
exception_type, panfrost_exception_name(pfdev, exception_type),
623+
access_type, access_type_name(pfdev, fault_status),
624+
source_id);
631625

632626
mmu_write(pfdev, MMU_INT_CLEAR, mask);
633627

‎drivers/gpu/drm/sun4i/sun8i_mixer.c

Lines changed: 92 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -106,48 +106,128 @@ static const struct de2_fmt_info de2_formats[] = {
106106
.rgb = true,
107107
.csc = SUN8I_CSC_MODE_OFF,
108108
},
109+
{
110+
/* for DE2 VI layer which ignores alpha */
111+
.drm_fmt = DRM_FORMAT_XRGB4444,
112+
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444,
113+
.rgb = true,
114+
.csc = SUN8I_CSC_MODE_OFF,
115+
},
109116
{
110117
.drm_fmt = DRM_FORMAT_ABGR4444,
111118
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444,
112119
.rgb = true,
113120
.csc = SUN8I_CSC_MODE_OFF,
114121
},
122+
{
123+
/* for DE2 VI layer which ignores alpha */
124+
.drm_fmt = DRM_FORMAT_XBGR4444,
125+
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444,
126+
.rgb = true,
127+
.csc = SUN8I_CSC_MODE_OFF,
128+
},
115129
{
116130
.drm_fmt = DRM_FORMAT_RGBA4444,
117131
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444,
118132
.rgb = true,
119133
.csc = SUN8I_CSC_MODE_OFF,
120134
},
135+
{
136+
/* for DE2 VI layer which ignores alpha */
137+
.drm_fmt = DRM_FORMAT_RGBX4444,
138+
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444,
139+
.rgb = true,
140+
.csc = SUN8I_CSC_MODE_OFF,
141+
},
121142
{
122143
.drm_fmt = DRM_FORMAT_BGRA4444,
123144
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444,
124145
.rgb = true,
125146
.csc = SUN8I_CSC_MODE_OFF,
126147
},
148+
{
149+
/* for DE2 VI layer which ignores alpha */
150+
.drm_fmt = DRM_FORMAT_BGRX4444,
151+
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444,
152+
.rgb = true,
153+
.csc = SUN8I_CSC_MODE_OFF,
154+
},
127155
{
128156
.drm_fmt = DRM_FORMAT_ARGB1555,
129157
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555,
130158
.rgb = true,
131159
.csc = SUN8I_CSC_MODE_OFF,
132160
},
161+
{
162+
/* for DE2 VI layer which ignores alpha */
163+
.drm_fmt = DRM_FORMAT_XRGB1555,
164+
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555,
165+
.rgb = true,
166+
.csc = SUN8I_CSC_MODE_OFF,
167+
},
133168
{
134169
.drm_fmt = DRM_FORMAT_ABGR1555,
135170
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555,
136171
.rgb = true,
137172
.csc = SUN8I_CSC_MODE_OFF,
138173
},
174+
{
175+
/* for DE2 VI layer which ignores alpha */
176+
.drm_fmt = DRM_FORMAT_XBGR1555,
177+
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555,
178+
.rgb = true,
179+
.csc = SUN8I_CSC_MODE_OFF,
180+
},
139181
{
140182
.drm_fmt = DRM_FORMAT_RGBA5551,
141183
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551,
142184
.rgb = true,
143185
.csc = SUN8I_CSC_MODE_OFF,
144186
},
187+
{
188+
/* for DE2 VI layer which ignores alpha */
189+
.drm_fmt = DRM_FORMAT_RGBX5551,
190+
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551,
191+
.rgb = true,
192+
.csc = SUN8I_CSC_MODE_OFF,
193+
},
145194
{
146195
.drm_fmt = DRM_FORMAT_BGRA5551,
147196
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551,
148197
.rgb = true,
149198
.csc = SUN8I_CSC_MODE_OFF,
150199
},
200+
{
201+
/* for DE2 VI layer which ignores alpha */
202+
.drm_fmt = DRM_FORMAT_BGRX5551,
203+
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551,
204+
.rgb = true,
205+
.csc = SUN8I_CSC_MODE_OFF,
206+
},
207+
{
208+
.drm_fmt = DRM_FORMAT_ARGB2101010,
209+
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB2101010,
210+
.rgb = true,
211+
.csc = SUN8I_CSC_MODE_OFF,
212+
},
213+
{
214+
.drm_fmt = DRM_FORMAT_ABGR2101010,
215+
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR2101010,
216+
.rgb = true,
217+
.csc = SUN8I_CSC_MODE_OFF,
218+
},
219+
{
220+
.drm_fmt = DRM_FORMAT_RGBA1010102,
221+
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA1010102,
222+
.rgb = true,
223+
.csc = SUN8I_CSC_MODE_OFF,
224+
},
225+
{
226+
.drm_fmt = DRM_FORMAT_BGRA1010102,
227+
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA1010102,
228+
.rgb = true,
229+
.csc = SUN8I_CSC_MODE_OFF,
230+
},
151231
{
152232
.drm_fmt = DRM_FORMAT_UYVY,
153233
.de2_fmt = SUN8I_MIXER_FBFMT_UYVY,
@@ -196,12 +276,6 @@ static const struct de2_fmt_info de2_formats[] = {
196276
.rgb = false,
197277
.csc = SUN8I_CSC_MODE_YUV2RGB,
198278
},
199-
{
200-
.drm_fmt = DRM_FORMAT_YUV444,
201-
.de2_fmt = SUN8I_MIXER_FBFMT_RGB888,
202-
.rgb = true,
203-
.csc = SUN8I_CSC_MODE_YUV2RGB,
204-
},
205279
{
206280
.drm_fmt = DRM_FORMAT_YUV422,
207281
.de2_fmt = SUN8I_MIXER_FBFMT_YUV422,
@@ -220,12 +294,6 @@ static const struct de2_fmt_info de2_formats[] = {
220294
.rgb = false,
221295
.csc = SUN8I_CSC_MODE_YUV2RGB,
222296
},
223-
{
224-
.drm_fmt = DRM_FORMAT_YVU444,
225-
.de2_fmt = SUN8I_MIXER_FBFMT_RGB888,
226-
.rgb = true,
227-
.csc = SUN8I_CSC_MODE_YVU2RGB,
228-
},
229297
{
230298
.drm_fmt = DRM_FORMAT_YVU422,
231299
.de2_fmt = SUN8I_MIXER_FBFMT_YUV422,
@@ -244,6 +312,18 @@ static const struct de2_fmt_info de2_formats[] = {
244312
.rgb = false,
245313
.csc = SUN8I_CSC_MODE_YVU2RGB,
246314
},
315+
{
316+
.drm_fmt = DRM_FORMAT_P010,
317+
.de2_fmt = SUN8I_MIXER_FBFMT_P010_YUV,
318+
.rgb = false,
319+
.csc = SUN8I_CSC_MODE_YUV2RGB,
320+
},
321+
{
322+
.drm_fmt = DRM_FORMAT_P210,
323+
.de2_fmt = SUN8I_MIXER_FBFMT_P210_YUV,
324+
.rgb = false,
325+
.csc = SUN8I_CSC_MODE_YUV2RGB,
326+
},
247327
};
248328

249329
const struct de2_fmt_info *sun8i_mixer_format_info(u32 format)

‎drivers/gpu/drm/sun4i/sun8i_mixer.h

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,10 @@
9393
#define SUN8I_MIXER_FBFMT_ABGR1555 17
9494
#define SUN8I_MIXER_FBFMT_RGBA5551 18
9595
#define SUN8I_MIXER_FBFMT_BGRA5551 19
96+
#define SUN8I_MIXER_FBFMT_ARGB2101010 20
97+
#define SUN8I_MIXER_FBFMT_ABGR2101010 21
98+
#define SUN8I_MIXER_FBFMT_RGBA1010102 22
99+
#define SUN8I_MIXER_FBFMT_BGRA1010102 23
96100

97101
#define SUN8I_MIXER_FBFMT_YUYV 0
98102
#define SUN8I_MIXER_FBFMT_UYVY 1
@@ -109,6 +113,13 @@
109113
/* format 12 is semi-planar YUV411 UVUV */
110114
/* format 13 is semi-planar YUV411 VUVU */
111115
#define SUN8I_MIXER_FBFMT_YUV411 14
116+
/* format 15 doesn't exist */
117+
/* format 16 is P010 YVU */
118+
#define SUN8I_MIXER_FBFMT_P010_YUV 17
119+
/* format 18 is P210 YVU */
120+
#define SUN8I_MIXER_FBFMT_P210_YUV 19
121+
/* format 20 is packed YVU444 10-bit */
122+
/* format 21 is packed YUV444 10-bit */
112123

113124
/*
114125
* Sub-engines listed bellow are unused for now. The EN registers are here only

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