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Hariharan Marifrankjaa
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KVM: s390: selftests: Add regression tests for SORTL and DFLTCC CPU subfunctions
Introduce new regression tests to verify the ASM inline block in the SORTL and DFLTCC CPU subfunctions for the s390x architecture. These tests ensure that future changes to the ASM code are properly validated. The test procedure: 1. Create a VM and request the KVM_S390_VM_CPU_MACHINE_SUBFUNC attribute from the KVM_S390_VM_CPU_MODEL group for this VM. This SUBFUNC attribute contains the results of all CPU subfunction instructions. 2. For each tested subfunction (SORTL and DFLTCC), execute the corresponding ASM instruction and capture the result array. 3. Perform a memory comparison between the results stored in the SUBFUNC attribute (obtained in step 1) and the ASM instruction results (obtained in step 2) for each tested subfunction. This process ensures that the KVM implementation accurately reflects the behavior of the actual CPU instructions for the tested subfunctions. Suggested-by: Janosch Frank <[email protected]> Signed-off-by: Hariharan Mari <[email protected]> Reviewed-by: Janosch Frank <[email protected]> Reviewed-by: Christoph Schlameuss <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Janosch Frank <[email protected]> Message-ID: <[email protected]>
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tools/testing/selftests/kvm/Makefile

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@@ -55,6 +55,7 @@ LIBKVM_aarch64 += lib/aarch64/vgic.c
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LIBKVM_s390x += lib/s390x/diag318_test_handler.c
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LIBKVM_s390x += lib/s390x/processor.c
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LIBKVM_s390x += lib/s390x/ucall.c
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LIBKVM_s390x += lib/s390x/facility.c
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LIBKVM_riscv += lib/riscv/handlers.S
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LIBKVM_riscv += lib/riscv/processor.c
@@ -189,6 +190,7 @@ TEST_GEN_PROGS_s390x += s390x/sync_regs_test
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TEST_GEN_PROGS_s390x += s390x/tprot
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TEST_GEN_PROGS_s390x += s390x/cmma_test
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TEST_GEN_PROGS_s390x += s390x/debug_test
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TEST_GEN_PROGS_s390x += s390x/cpumodel_subfuncs_test
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TEST_GEN_PROGS_s390x += s390x/shared_zeropage_test
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TEST_GEN_PROGS_s390x += s390x/ucontrol_test
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TEST_GEN_PROGS_s390x += demand_paging_test
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright IBM Corp. 2024
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*
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* Authors:
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* Hariharan Mari <[email protected]>
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*
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* Get the facility bits with the STFLE instruction
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*/
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#ifndef SELFTEST_KVM_FACILITY_H
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#define SELFTEST_KVM_FACILITY_H
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#include <linux/bitops.h>
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/* alt_stfle_fac_list[16] + stfle_fac_list[16] */
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#define NB_STFL_DOUBLEWORDS 32
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extern uint64_t stfl_doublewords[NB_STFL_DOUBLEWORDS];
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extern bool stfle_flag;
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static inline bool test_bit_inv(unsigned long nr, const unsigned long *ptr)
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{
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return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
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}
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static inline void stfle(uint64_t *fac, unsigned int nb_doublewords)
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{
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register unsigned long r0 asm("0") = nb_doublewords - 1;
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asm volatile(" .insn s,0xb2b00000,0(%1)\n"
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: "+d" (r0)
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: "a" (fac)
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: "memory", "cc");
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}
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static inline void setup_facilities(void)
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{
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stfle(stfl_doublewords, NB_STFL_DOUBLEWORDS);
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stfle_flag = true;
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}
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static inline bool test_facility(int nr)
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{
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if (!stfle_flag)
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setup_facilities();
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return test_bit_inv(nr, stfl_doublewords);
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}
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#endif
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright IBM Corp. 2024
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*
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* Authors:
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* Hariharan Mari <[email protected]>
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*
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* Contains the definition for the global variables to have the test facitlity feature.
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*/
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#include "facility.h"
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uint64_t stfl_doublewords[NB_STFL_DOUBLEWORDS];
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bool stfle_flag;
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright IBM Corp. 2024
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*
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* Authors:
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* Hariharan Mari <[email protected]>
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*
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* The tests compare the result of the KVM ioctl for obtaining CPU subfunction data with those
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* from an ASM block performing the same CPU subfunction. Currently KVM doesn't mask instruction
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* query data reported via the CPU Model, allowing us to directly compare it with the data
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* acquired through executing the queries in the test.
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*/
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <sys/ioctl.h>
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#include "facility.h"
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#include "kvm_util.h"
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/* Query available CPU subfunctions */
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struct kvm_s390_vm_cpu_subfunc cpu_subfunc;
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static void get_cpu_machine_subfuntions(struct kvm_vm *vm,
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struct kvm_s390_vm_cpu_subfunc *cpu_subfunc)
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{
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int r;
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r = __kvm_device_attr_get(vm->fd, KVM_S390_VM_CPU_MODEL,
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KVM_S390_VM_CPU_MACHINE_SUBFUNC, cpu_subfunc);
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TEST_ASSERT(!r, "Get cpu subfunctions failed r=%d errno=%d", r, errno);
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}
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/* Testing Sort Lists (SORTL) CPU subfunction's ASM block */
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static void test_sortl_asm_block(u8 (*query)[32])
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{
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asm volatile(" lghi 0,0\n"
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" la 1,%[query]\n"
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" .insn rre,0xb9380000,2,4\n"
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: [query] "=R" (*query)
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:
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: "cc", "0", "1");
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}
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/* Testing Deflate Conversion Call (DFLTCC) CPU subfunction's ASM block */
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static void test_dfltcc_asm_block(u8 (*query)[32])
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{
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asm volatile(" lghi 0,0\n"
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" la 1,%[query]\n"
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" .insn rrf,0xb9390000,2,4,6,0\n"
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: [query] "=R" (*query)
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:
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: "cc", "0", "1");
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}
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typedef void (*testfunc_t)(u8 (*array)[]);
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struct testdef {
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const char *subfunc_name;
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u8 *subfunc_array;
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size_t array_size;
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testfunc_t test;
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int facility_bit;
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} testlist[] = {
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/* SORTL - Facility bit 150 */
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{ "SORTL", cpu_subfunc.sortl, sizeof(cpu_subfunc.sortl), test_sortl_asm_block, 150 },
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/* DFLTCC - Facility bit 151 */
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{ "DFLTCC", cpu_subfunc.dfltcc, sizeof(cpu_subfunc.dfltcc), test_dfltcc_asm_block, 151 },
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};
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int main(int argc, char *argv[])
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{
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struct kvm_vm *vm;
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int idx;
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ksft_print_header();
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vm = vm_create(1);
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memset(&cpu_subfunc, 0, sizeof(cpu_subfunc));
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get_cpu_machine_subfuntions(vm, &cpu_subfunc);
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ksft_set_plan(ARRAY_SIZE(testlist));
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for (idx = 0; idx < ARRAY_SIZE(testlist); idx++) {
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if (test_facility(testlist[idx].facility_bit)) {
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u8 *array = malloc(testlist[idx].array_size);
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testlist[idx].test((u8 (*)[testlist[idx].array_size])array);
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TEST_ASSERT_EQ(memcmp(testlist[idx].subfunc_array,
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array, testlist[idx].array_size), 0);
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ksft_test_result_pass("%s\n", testlist[idx].subfunc_name);
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free(array);
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} else {
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ksft_test_result_skip("%s feature is not avaialable\n",
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testlist[idx].subfunc_name);
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}
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}
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kvm_vm_free(vm);
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ksft_finished();
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}

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