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Merge tag 'mips-fixes_6.0_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS fixes from Thomas Bogendoerfer: - fix missing export for Lantiq watchdog driver - fix ethernet phy interface setup for Loongson32 * tag 'mips-fixes_6.0_2' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: MIPS: Loongson32: Fix PHY-mode being left unspecified MIPS: lantiq: export clk_get_io() for lantiq_wdt.ko
2 parents 88e6546 + e9f3f8f commit 26c9564

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+9
-8
lines changed

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-8
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arch/mips/lantiq/clk.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@ struct clk *clk_get_io(void)
5050
{
5151
return &cpu_clk_generic[2];
5252
}
53+
EXPORT_SYMBOL_GPL(clk_get_io);
5354

5455
struct clk *clk_get_ppe(void)
5556
{

arch/mips/loongson32/common/platform.c

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
9898
if (plat_dat->bus_id) {
9999
__raw_writel(__raw_readl(LS1X_MUX_CTRL0) | GMAC1_USE_UART1 |
100100
GMAC1_USE_UART0, LS1X_MUX_CTRL0);
101-
switch (plat_dat->interface) {
101+
switch (plat_dat->phy_interface) {
102102
case PHY_INTERFACE_MODE_RGMII:
103103
val &= ~(GMAC1_USE_TXCLK | GMAC1_USE_PWM23);
104104
break;
@@ -107,12 +107,12 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
107107
break;
108108
default:
109109
pr_err("unsupported mii mode %d\n",
110-
plat_dat->interface);
110+
plat_dat->phy_interface);
111111
return -ENOTSUPP;
112112
}
113113
val &= ~GMAC1_SHUT;
114114
} else {
115-
switch (plat_dat->interface) {
115+
switch (plat_dat->phy_interface) {
116116
case PHY_INTERFACE_MODE_RGMII:
117117
val &= ~(GMAC0_USE_TXCLK | GMAC0_USE_PWM01);
118118
break;
@@ -121,7 +121,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
121121
break;
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default:
123123
pr_err("unsupported mii mode %d\n",
124-
plat_dat->interface);
124+
plat_dat->phy_interface);
125125
return -ENOTSUPP;
126126
}
127127
val &= ~GMAC0_SHUT;
@@ -131,7 +131,7 @@ int ls1x_eth_mux_init(struct platform_device *pdev, void *priv)
131131
plat_dat = dev_get_platdata(&pdev->dev);
132132

133133
val &= ~PHY_INTF_SELI;
134-
if (plat_dat->interface == PHY_INTERFACE_MODE_RMII)
134+
if (plat_dat->phy_interface == PHY_INTERFACE_MODE_RMII)
135135
val |= 0x4 << PHY_INTF_SELI_SHIFT;
136136
__raw_writel(val, LS1X_MUX_CTRL1);
137137

@@ -146,9 +146,9 @@ static struct plat_stmmacenet_data ls1x_eth0_pdata = {
146146
.bus_id = 0,
147147
.phy_addr = -1,
148148
#if defined(CONFIG_LOONGSON1_LS1B)
149-
.interface = PHY_INTERFACE_MODE_MII,
149+
.phy_interface = PHY_INTERFACE_MODE_MII,
150150
#elif defined(CONFIG_LOONGSON1_LS1C)
151-
.interface = PHY_INTERFACE_MODE_RMII,
151+
.phy_interface = PHY_INTERFACE_MODE_RMII,
152152
#endif
153153
.mdio_bus_data = &ls1x_mdio_bus_data,
154154
.dma_cfg = &ls1x_eth_dma_cfg,
@@ -186,7 +186,7 @@ struct platform_device ls1x_eth0_pdev = {
186186
static struct plat_stmmacenet_data ls1x_eth1_pdata = {
187187
.bus_id = 1,
188188
.phy_addr = -1,
189-
.interface = PHY_INTERFACE_MODE_MII,
189+
.phy_interface = PHY_INTERFACE_MODE_MII,
190190
.mdio_bus_data = &ls1x_mdio_bus_data,
191191
.dma_cfg = &ls1x_eth_dma_cfg,
192192
.has_gmac = 1,

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