|
12 | 12 |
|
13 | 13 | .fill 1, 8, 0 # STATE (set by CPU)
|
14 | 14 | .fill 1, 8, 0 # FLAGS
|
15 |
| - .quad encl_ssa # OSSA |
| 15 | + .quad encl_ssa_tcs1 # OSSA |
16 | 16 | .fill 1, 4, 0 # CSSA (set by CPU)
|
17 | 17 | .fill 1, 4, 1 # NSSA
|
18 | 18 | .quad encl_entry # OENTRY
|
|
23 | 23 | .fill 1, 4, 0xFFFFFFFF # GSLIMIT
|
24 | 24 | .fill 4024, 1, 0 # Reserved
|
25 | 25 |
|
26 |
| - # Identical to the previous TCS. |
| 26 | + # TCS2 |
27 | 27 | .fill 1, 8, 0 # STATE (set by CPU)
|
28 | 28 | .fill 1, 8, 0 # FLAGS
|
29 |
| - .quad encl_ssa # OSSA |
| 29 | + .quad encl_ssa_tcs2 # OSSA |
30 | 30 | .fill 1, 4, 0 # CSSA (set by CPU)
|
31 | 31 | .fill 1, 4, 1 # NSSA
|
32 | 32 | .quad encl_entry # OENTRY
|
|
40 | 40 | .text
|
41 | 41 |
|
42 | 42 | encl_entry:
|
43 |
| - # RBX contains the base address for TCS, which is also the first address |
44 |
| - # inside the enclave. By adding the value of le_stack_end to it, we get |
| 43 | + # RBX contains the base address for TCS, which is the first address |
| 44 | + # inside the enclave for TCS #1 and one page into the enclave for |
| 45 | + # TCS #2. By adding the value of encl_stack to it, we get |
45 | 46 | # the absolute address for the stack.
|
46 | 47 | lea (encl_stack)(%rbx), %rax
|
47 | 48 | xchg %rsp, %rax
|
@@ -81,9 +82,15 @@ encl_entry:
|
81 | 82 |
|
82 | 83 | .section ".data", "aw"
|
83 | 84 |
|
84 |
| -encl_ssa: |
| 85 | +encl_ssa_tcs1: |
| 86 | + .space 4096 |
| 87 | +encl_ssa_tcs2: |
85 | 88 | .space 4096
|
86 | 89 |
|
87 | 90 | .balign 4096
|
88 |
| - .space 8192 |
| 91 | + # Stack of TCS #1 |
| 92 | + .space 4096 |
89 | 93 | encl_stack:
|
| 94 | + .balign 4096 |
| 95 | + # Stack of TCS #2 |
| 96 | + .space 4096 |
0 commit comments