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Commit 2862da4

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Paolo Abeni
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Merge branch 'net-dsa-b53-fix-rgmii-ports'
Jonas Gorski says: ==================== net: dsa: b53: fix RGMII ports RGMII ports on BCM63xx were not really working, especially with PHYs that support EEE and are capable of configuring their own RGMII delays. So let's make them work, and fix additional minor rgmii related issues found while working on it. With a BCM96328BU-P300: Before: [ 3.580000] b53-switch 10700000.switch GbE3 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL [ 3.600000] b53-switch 10700000.switch GbE3 (uninitialized): failed to connect to PHY: -EINVAL [ 3.610000] b53-switch 10700000.switch GbE3 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 4 [ 3.620000] b53-switch 10700000.switch GbE1 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL [ 3.640000] b53-switch 10700000.switch GbE1 (uninitialized): failed to connect to PHY: -EINVAL [ 3.650000] b53-switch 10700000.switch GbE1 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 5 [ 3.660000] b53-switch 10700000.switch GbE4 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL [ 3.680000] b53-switch 10700000.switch GbE4 (uninitialized): failed to connect to PHY: -EINVAL [ 3.690000] b53-switch 10700000.switch GbE4 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 6 [ 3.700000] b53-switch 10700000.switch GbE5 (uninitialized): validation of rgmii with support 0000000,00000000,00000000,000062ff and advertisement 0000000,00000000,00000000,000062ff failed: -EINVAL [ 3.720000] b53-switch 10700000.switch GbE5 (uninitialized): failed to connect to PHY: -EINVAL [ 3.730000] b53-switch 10700000.switch GbE5 (uninitialized): error -22 setting up PHY for tree 0, switch 0, port 7 After: [ 3.700000] b53-switch 10700000.switch GbE3 (uninitialized): PHY [mdio_mux-0.1:00] driver [Broadcom BCM54612E] (irq=POLL) [ 3.770000] b53-switch 10700000.switch GbE1 (uninitialized): PHY [mdio_mux-0.1:01] driver [Broadcom BCM54612E] (irq=POLL) [ 3.850000] b53-switch 10700000.switch GbE4 (uninitialized): PHY [mdio_mux-0.1:18] driver [Broadcom BCM54612E] (irq=POLL) [ 3.920000] b53-switch 10700000.switch GbE5 (uninitialized): PHY [mdio_mux-0.1:19] driver [Broadcom BCM54612E] (irq=POLL) ==================== Link: https://patch.msgid.link/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
2 parents 919d763 + bc1a65e commit 2862da4

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‎drivers/net/dsa/b53/b53_common.c

Lines changed: 22 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -22,6 +22,7 @@
2222
#include <linux/gpio.h>
2323
#include <linux/kernel.h>
2424
#include <linux/math.h>
25+
#include <linux/minmax.h>
2526
#include <linux/module.h>
2627
#include <linux/platform_data/b53.h>
2728
#include <linux/phy.h>
@@ -1322,41 +1323,17 @@ static void b53_adjust_63xx_rgmii(struct dsa_switch *ds, int port,
13221323
phy_interface_t interface)
13231324
{
13241325
struct b53_device *dev = ds->priv;
1325-
u8 rgmii_ctrl = 0, off;
1326-
1327-
if (port == dev->imp_port)
1328-
off = B53_RGMII_CTRL_IMP;
1329-
else
1330-
off = B53_RGMII_CTRL_P(port);
1326+
u8 rgmii_ctrl = 0;
13311327

1332-
b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
1333-
1334-
switch (interface) {
1335-
case PHY_INTERFACE_MODE_RGMII_ID:
1336-
rgmii_ctrl |= (RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
1337-
break;
1338-
case PHY_INTERFACE_MODE_RGMII_RXID:
1339-
rgmii_ctrl &= ~(RGMII_CTRL_DLL_TXC);
1340-
rgmii_ctrl |= RGMII_CTRL_DLL_RXC;
1341-
break;
1342-
case PHY_INTERFACE_MODE_RGMII_TXID:
1343-
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC);
1344-
rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
1345-
break;
1346-
case PHY_INTERFACE_MODE_RGMII:
1347-
default:
1348-
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
1349-
break;
1350-
}
1328+
b53_read8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), &rgmii_ctrl);
1329+
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
13511330

1352-
if (port != dev->imp_port) {
1353-
if (is63268(dev))
1354-
rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;
1331+
if (is63268(dev))
1332+
rgmii_ctrl |= RGMII_CTRL_MII_OVERRIDE;
13551333

1356-
rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
1357-
}
1334+
rgmii_ctrl |= RGMII_CTRL_ENABLE_GMII;
13581335

1359-
b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
1336+
b53_write8(dev, B53_CTRL_PAGE, B53_RGMII_CTRL_P(port), rgmii_ctrl);
13601337

13611338
dev_dbg(ds->dev, "Configured port %d for %s\n", port,
13621339
phy_modes(interface));
@@ -1377,8 +1354,7 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,
13771354
* tx_clk aligned timing (restoring to reset defaults)
13781355
*/
13791356
b53_read8(dev, B53_CTRL_PAGE, off, &rgmii_ctrl);
1380-
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC |
1381-
RGMII_CTRL_TIMING_SEL);
1357+
rgmii_ctrl &= ~(RGMII_CTRL_DLL_RXC | RGMII_CTRL_DLL_TXC);
13821358

13831359
/* PHY_INTERFACE_MODE_RGMII_TXID means TX internal delay, make
13841360
* sure that we enable the port TX clock internal delay to
@@ -1398,7 +1374,10 @@ static void b53_adjust_531x5_rgmii(struct dsa_switch *ds, int port,
13981374
rgmii_ctrl |= RGMII_CTRL_DLL_TXC;
13991375
if (interface == PHY_INTERFACE_MODE_RGMII)
14001376
rgmii_ctrl |= RGMII_CTRL_DLL_TXC | RGMII_CTRL_DLL_RXC;
1401-
rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
1377+
1378+
if (dev->chip_id != BCM53115_DEVICE_ID)
1379+
rgmii_ctrl |= RGMII_CTRL_TIMING_SEL;
1380+
14021381
b53_write8(dev, B53_CTRL_PAGE, off, rgmii_ctrl);
14031382

14041383
dev_info(ds->dev, "Configured port %d for %s\n", port,
@@ -1462,6 +1441,10 @@ static void b53_phylink_get_caps(struct dsa_switch *ds, int port,
14621441
__set_bit(PHY_INTERFACE_MODE_MII, config->supported_interfaces);
14631442
__set_bit(PHY_INTERFACE_MODE_REVMII, config->supported_interfaces);
14641443

1444+
/* BCM63xx RGMII ports support RGMII */
1445+
if (is63xx(dev) && in_range(port, B53_63XX_RGMII0, 4))
1446+
phy_interface_set_rgmii(config->supported_interfaces);
1447+
14651448
config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
14661449
MAC_10 | MAC_100;
14671450

@@ -1501,7 +1484,7 @@ static void b53_phylink_mac_config(struct phylink_config *config,
15011484
struct b53_device *dev = ds->priv;
15021485
int port = dp->index;
15031486

1504-
if (is63xx(dev) && port >= B53_63XX_RGMII0)
1487+
if (is63xx(dev) && in_range(port, B53_63XX_RGMII0, 4))
15051488
b53_adjust_63xx_rgmii(ds, port, interface);
15061489

15071490
if (mode == MLO_AN_FIXED) {
@@ -2353,6 +2336,9 @@ int b53_eee_init(struct dsa_switch *ds, int port, struct phy_device *phy)
23532336
{
23542337
int ret;
23552338

2339+
if (!b53_support_eee(ds, port))
2340+
return 0;
2341+
23562342
ret = phy_init_eee(phy, false);
23572343
if (ret)
23582344
return 0;
@@ -2367,7 +2353,7 @@ bool b53_support_eee(struct dsa_switch *ds, int port)
23672353
{
23682354
struct b53_device *dev = ds->priv;
23692355

2370-
return !is5325(dev) && !is5365(dev);
2356+
return !is5325(dev) && !is5365(dev) && !is63xx(dev);
23712357
}
23722358
EXPORT_SYMBOL(b53_support_eee);
23732359

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