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ASoC: nau8xxx: Implement hw constraint for rates
Merge series from Takashi Iwai <[email protected]>: This is a series of patches to address the issues on nau8xxx codecs I've stumbled upon while dealing with a bug report for Steam Deck. Most of them are to implement the missing hw constraint for rate restrictions while one patch is to fix the semaphore unbalance in nau8824 driver.
2 parents 13e575d + be91923 commit 2a91980

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4 files changed

+156
-113
lines changed

4 files changed

+156
-113
lines changed

‎sound/soc/codecs/nau8540.c

Lines changed: 29 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -357,39 +357,56 @@ static const struct snd_soc_dapm_route nau8540_dapm_routes[] = {
357357
{"AIFTX", NULL, "Digital CH4 Mux"},
358358
};
359359

360-
static int nau8540_clock_check(struct nau8540 *nau8540, int rate, int osr)
360+
static const struct nau8540_osr_attr *
361+
nau8540_get_osr(struct nau8540 *nau8540)
361362
{
363+
unsigned int osr;
364+
365+
regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr);
366+
osr &= NAU8540_ADC_OSR_MASK;
362367
if (osr >= ARRAY_SIZE(osr_adc_sel))
363-
return -EINVAL;
368+
return NULL;
369+
return &osr_adc_sel[osr];
370+
}
371+
372+
static int nau8540_dai_startup(struct snd_pcm_substream *substream,
373+
struct snd_soc_dai *dai)
374+
{
375+
struct snd_soc_component *component = dai->component;
376+
struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
377+
const struct nau8540_osr_attr *osr;
364378

365-
if (rate * osr > CLK_ADC_MAX) {
366-
dev_err(nau8540->dev, "exceed the maximum frequency of CLK_ADC\n");
379+
osr = nau8540_get_osr(nau8540);
380+
if (!osr || !osr->osr)
367381
return -EINVAL;
368-
}
369382

370-
return 0;
383+
return snd_pcm_hw_constraint_minmax(substream->runtime,
384+
SNDRV_PCM_HW_PARAM_RATE,
385+
0, CLK_ADC_MAX / osr->osr);
371386
}
372387

373388
static int nau8540_hw_params(struct snd_pcm_substream *substream,
374389
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
375390
{
376391
struct snd_soc_component *component = dai->component;
377392
struct nau8540 *nau8540 = snd_soc_component_get_drvdata(component);
378-
unsigned int val_len = 0, osr;
393+
unsigned int val_len = 0;
394+
const struct nau8540_osr_attr *osr;
379395

380396
/* CLK_ADC = OSR * FS
381397
* ADC clock frequency is defined as Over Sampling Rate (OSR)
382398
* multiplied by the audio sample rate (Fs). Note that the OSR and Fs
383399
* values must be selected such that the maximum frequency is less
384400
* than 6.144 MHz.
385401
*/
386-
regmap_read(nau8540->regmap, NAU8540_REG_ADC_SAMPLE_RATE, &osr);
387-
osr &= NAU8540_ADC_OSR_MASK;
388-
if (nau8540_clock_check(nau8540, params_rate(params), osr))
402+
osr = nau8540_get_osr(nau8540);
403+
if (!osr || !osr->osr)
404+
return -EINVAL;
405+
if (params_rate(params) * osr->osr > CLK_ADC_MAX)
389406
return -EINVAL;
390407
regmap_update_bits(nau8540->regmap, NAU8540_REG_CLOCK_SRC,
391408
NAU8540_CLK_ADC_SRC_MASK,
392-
osr_adc_sel[osr].clk_src << NAU8540_CLK_ADC_SRC_SFT);
409+
osr->clk_src << NAU8540_CLK_ADC_SRC_SFT);
393410

394411
switch (params_width(params)) {
395412
case 16:
@@ -515,6 +532,7 @@ static int nau8540_set_tdm_slot(struct snd_soc_dai *dai,
515532

516533

517534
static const struct snd_soc_dai_ops nau8540_dai_ops = {
535+
.startup = nau8540_dai_startup,
518536
.hw_params = nau8540_hw_params,
519537
.set_fmt = nau8540_set_fmt,
520538
.set_tdm_slot = nau8540_set_tdm_slot,

‎sound/soc/codecs/nau8821.c

Lines changed: 36 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -670,36 +670,49 @@ static const struct snd_soc_dapm_route nau8821_dapm_routes[] = {
670670
{"HPOR", NULL, "Class G"},
671671
};
672672

673-
static int nau8821_clock_check(struct nau8821 *nau8821,
674-
int stream, int rate, int osr)
673+
static const struct nau8821_osr_attr *
674+
nau8821_get_osr(struct nau8821 *nau8821, int stream)
675675
{
676-
int osrate = 0;
676+
unsigned int osr;
677677

678678
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
679+
regmap_read(nau8821->regmap, NAU8821_R2C_DAC_CTRL1, &osr);
680+
osr &= NAU8821_DAC_OVERSAMPLE_MASK;
679681
if (osr >= ARRAY_SIZE(osr_dac_sel))
680-
return -EINVAL;
681-
osrate = osr_dac_sel[osr].osr;
682+
return NULL;
683+
return &osr_dac_sel[osr];
682684
} else {
685+
regmap_read(nau8821->regmap, NAU8821_R2B_ADC_RATE, &osr);
686+
osr &= NAU8821_ADC_SYNC_DOWN_MASK;
683687
if (osr >= ARRAY_SIZE(osr_adc_sel))
684-
return -EINVAL;
685-
osrate = osr_adc_sel[osr].osr;
688+
return NULL;
689+
return &osr_adc_sel[osr];
686690
}
691+
}
687692

688-
if (!osrate || rate * osrate > CLK_DA_AD_MAX) {
689-
dev_err(nau8821->dev,
690-
"exceed the maximum frequency of CLK_ADC or CLK_DAC");
693+
static int nau8821_dai_startup(struct snd_pcm_substream *substream,
694+
struct snd_soc_dai *dai)
695+
{
696+
struct snd_soc_component *component = dai->component;
697+
struct nau8821 *nau8821 = snd_soc_component_get_drvdata(component);
698+
const struct nau8821_osr_attr *osr;
699+
700+
osr = nau8821_get_osr(nau8821, substream->stream);
701+
if (!osr || !osr->osr)
691702
return -EINVAL;
692-
}
693703

694-
return 0;
704+
return snd_pcm_hw_constraint_minmax(substream->runtime,
705+
SNDRV_PCM_HW_PARAM_RATE,
706+
0, CLK_DA_AD_MAX / osr->osr);
695707
}
696708

697709
static int nau8821_hw_params(struct snd_pcm_substream *substream,
698710
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
699711
{
700712
struct snd_soc_component *component = dai->component;
701713
struct nau8821 *nau8821 = snd_soc_component_get_drvdata(component);
702-
unsigned int val_len = 0, osr, ctrl_val, bclk_fs, clk_div;
714+
unsigned int val_len = 0, ctrl_val, bclk_fs, clk_div;
715+
const struct nau8821_osr_attr *osr;
703716

704717
nau8821->fs = params_rate(params);
705718
/* CLK_DAC or CLK_ADC = OSR * FS
@@ -708,27 +721,19 @@ static int nau8821_hw_params(struct snd_pcm_substream *substream,
708721
* values must be selected such that the maximum frequency is less
709722
* than 6.144 MHz.
710723
*/
711-
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
712-
regmap_read(nau8821->regmap, NAU8821_R2C_DAC_CTRL1, &osr);
713-
osr &= NAU8821_DAC_OVERSAMPLE_MASK;
714-
if (nau8821_clock_check(nau8821, substream->stream,
715-
nau8821->fs, osr)) {
716-
return -EINVAL;
717-
}
724+
osr = nau8821_get_osr(nau8821, substream->stream);
725+
if (!osr || !osr->osr)
726+
return -EINVAL;
727+
if (nau8821->fs * osr->osr > CLK_DA_AD_MAX)
728+
return -EINVAL;
729+
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
718730
regmap_update_bits(nau8821->regmap, NAU8821_R03_CLK_DIVIDER,
719731
NAU8821_CLK_DAC_SRC_MASK,
720-
osr_dac_sel[osr].clk_src << NAU8821_CLK_DAC_SRC_SFT);
721-
} else {
722-
regmap_read(nau8821->regmap, NAU8821_R2B_ADC_RATE, &osr);
723-
osr &= NAU8821_ADC_SYNC_DOWN_MASK;
724-
if (nau8821_clock_check(nau8821, substream->stream,
725-
nau8821->fs, osr)) {
726-
return -EINVAL;
727-
}
732+
osr->clk_src << NAU8821_CLK_DAC_SRC_SFT);
733+
else
728734
regmap_update_bits(nau8821->regmap, NAU8821_R03_CLK_DIVIDER,
729735
NAU8821_CLK_ADC_SRC_MASK,
730-
osr_adc_sel[osr].clk_src << NAU8821_CLK_ADC_SRC_SFT);
731-
}
736+
osr->clk_src << NAU8821_CLK_ADC_SRC_SFT);
732737

733738
/* make BCLK and LRC divde configuration if the codec as master. */
734739
regmap_read(nau8821->regmap, NAU8821_R1D_I2S_PCM_CTRL2, &ctrl_val);
@@ -843,6 +848,7 @@ static int nau8821_digital_mute(struct snd_soc_dai *dai, int mute,
843848
}
844849

845850
static const struct snd_soc_dai_ops nau8821_dai_ops = {
851+
.startup = nau8821_dai_startup,
846852
.hw_params = nau8821_hw_params,
847853
.set_fmt = nau8821_set_dai_fmt,
848854
.mute_stream = nau8821_digital_mute,

‎sound/soc/codecs/nau8824.c

Lines changed: 46 additions & 34 deletions
Original file line numberDiff line numberDiff line change
@@ -1014,35 +1014,52 @@ static irqreturn_t nau8824_interrupt(int irq, void *data)
10141014
return IRQ_HANDLED;
10151015
}
10161016

1017-
static int nau8824_clock_check(struct nau8824 *nau8824,
1018-
int stream, int rate, int osr)
1017+
static const struct nau8824_osr_attr *
1018+
nau8824_get_osr(struct nau8824 *nau8824, int stream)
10191019
{
1020-
int osrate;
1020+
unsigned int osr;
10211021

10221022
if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1023+
regmap_read(nau8824->regmap,
1024+
NAU8824_REG_DAC_FILTER_CTRL_1, &osr);
1025+
osr &= NAU8824_DAC_OVERSAMPLE_MASK;
10231026
if (osr >= ARRAY_SIZE(osr_dac_sel))
1024-
return -EINVAL;
1025-
osrate = osr_dac_sel[osr].osr;
1027+
return NULL;
1028+
return &osr_dac_sel[osr];
10261029
} else {
1030+
regmap_read(nau8824->regmap,
1031+
NAU8824_REG_ADC_FILTER_CTRL, &osr);
1032+
osr &= NAU8824_ADC_SYNC_DOWN_MASK;
10271033
if (osr >= ARRAY_SIZE(osr_adc_sel))
1028-
return -EINVAL;
1029-
osrate = osr_adc_sel[osr].osr;
1034+
return NULL;
1035+
return &osr_adc_sel[osr];
10301036
}
1037+
}
1038+
1039+
static int nau8824_dai_startup(struct snd_pcm_substream *substream,
1040+
struct snd_soc_dai *dai)
1041+
{
1042+
struct snd_soc_component *component = dai->component;
1043+
struct nau8824 *nau8824 = snd_soc_component_get_drvdata(component);
1044+
const struct nau8824_osr_attr *osr;
10311045

1032-
if (!osrate || rate * osr > CLK_DA_AD_MAX) {
1033-
dev_err(nau8824->dev, "exceed the maximum frequency of CLK_ADC or CLK_DAC\n");
1046+
osr = nau8824_get_osr(nau8824, substream->stream);
1047+
if (!osr || !osr->osr)
10341048
return -EINVAL;
1035-
}
10361049

1037-
return 0;
1050+
return snd_pcm_hw_constraint_minmax(substream->runtime,
1051+
SNDRV_PCM_HW_PARAM_RATE,
1052+
0, CLK_DA_AD_MAX / osr->osr);
10381053
}
10391054

10401055
static int nau8824_hw_params(struct snd_pcm_substream *substream,
10411056
struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
10421057
{
10431058
struct snd_soc_component *component = dai->component;
10441059
struct nau8824 *nau8824 = snd_soc_component_get_drvdata(component);
1045-
unsigned int val_len = 0, osr, ctrl_val, bclk_fs, bclk_div;
1060+
unsigned int val_len = 0, ctrl_val, bclk_fs, bclk_div;
1061+
const struct nau8824_osr_attr *osr;
1062+
int err = -EINVAL;
10461063

10471064
nau8824_sema_acquire(nau8824, HZ);
10481065

@@ -1053,27 +1070,19 @@ static int nau8824_hw_params(struct snd_pcm_substream *substream,
10531070
* than 6.144 MHz.
10541071
*/
10551072
nau8824->fs = params_rate(params);
1056-
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1057-
regmap_read(nau8824->regmap,
1058-
NAU8824_REG_DAC_FILTER_CTRL_1, &osr);
1059-
osr &= NAU8824_DAC_OVERSAMPLE_MASK;
1060-
if (nau8824_clock_check(nau8824, substream->stream,
1061-
nau8824->fs, osr))
1062-
return -EINVAL;
1073+
osr = nau8824_get_osr(nau8824, substream->stream);
1074+
if (!osr || !osr->osr)
1075+
goto error;
1076+
if (nau8824->fs * osr->osr > CLK_DA_AD_MAX)
1077+
goto error;
1078+
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
10631079
regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER,
10641080
NAU8824_CLK_DAC_SRC_MASK,
1065-
osr_dac_sel[osr].clk_src << NAU8824_CLK_DAC_SRC_SFT);
1066-
} else {
1067-
regmap_read(nau8824->regmap,
1068-
NAU8824_REG_ADC_FILTER_CTRL, &osr);
1069-
osr &= NAU8824_ADC_SYNC_DOWN_MASK;
1070-
if (nau8824_clock_check(nau8824, substream->stream,
1071-
nau8824->fs, osr))
1072-
return -EINVAL;
1081+
osr->clk_src << NAU8824_CLK_DAC_SRC_SFT);
1082+
else
10731083
regmap_update_bits(nau8824->regmap, NAU8824_REG_CLK_DIVIDER,
10741084
NAU8824_CLK_ADC_SRC_MASK,
1075-
osr_adc_sel[osr].clk_src << NAU8824_CLK_ADC_SRC_SFT);
1076-
}
1085+
osr->clk_src << NAU8824_CLK_ADC_SRC_SFT);
10771086

10781087
/* make BCLK and LRC divde configuration if the codec as master. */
10791088
regmap_read(nau8824->regmap,
@@ -1090,7 +1099,7 @@ static int nau8824_hw_params(struct snd_pcm_substream *substream,
10901099
else if (bclk_fs <= 256)
10911100
bclk_div = 0;
10921101
else
1093-
return -EINVAL;
1102+
goto error;
10941103
regmap_update_bits(nau8824->regmap,
10951104
NAU8824_REG_PORT0_I2S_PCM_CTRL_2,
10961105
NAU8824_I2S_LRC_DIV_MASK | NAU8824_I2S_BLK_DIV_MASK,
@@ -1111,15 +1120,17 @@ static int nau8824_hw_params(struct snd_pcm_substream *substream,
11111120
val_len |= NAU8824_I2S_DL_32;
11121121
break;
11131122
default:
1114-
return -EINVAL;
1123+
goto error;
11151124
}
11161125

11171126
regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1,
11181127
NAU8824_I2S_DL_MASK, val_len);
1128+
err = 0;
11191129

1130+
error:
11201131
nau8824_sema_release(nau8824);
11211132

1122-
return 0;
1133+
return err;
11231134
}
11241135

11251136
static int nau8824_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
@@ -1128,8 +1139,6 @@ static int nau8824_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
11281139
struct nau8824 *nau8824 = snd_soc_component_get_drvdata(component);
11291140
unsigned int ctrl1_val = 0, ctrl2_val = 0;
11301141

1131-
nau8824_sema_acquire(nau8824, HZ);
1132-
11331142
switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
11341143
case SND_SOC_DAIFMT_CBM_CFM:
11351144
ctrl2_val |= NAU8824_I2S_MS_MASTER;
@@ -1171,6 +1180,8 @@ static int nau8824_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
11711180
return -EINVAL;
11721181
}
11731182

1183+
nau8824_sema_acquire(nau8824, HZ);
1184+
11741185
regmap_update_bits(nau8824->regmap, NAU8824_REG_PORT0_I2S_PCM_CTRL_1,
11751186
NAU8824_I2S_DF_MASK | NAU8824_I2S_BP_MASK |
11761187
NAU8824_I2S_PCMB_EN, ctrl1_val);
@@ -1547,6 +1558,7 @@ static const struct snd_soc_component_driver nau8824_component_driver = {
15471558
};
15481559

15491560
static const struct snd_soc_dai_ops nau8824_dai_ops = {
1561+
.startup = nau8824_dai_startup,
15501562
.hw_params = nau8824_hw_params,
15511563
.set_fmt = nau8824_set_fmt,
15521564
.set_tdm_slot = nau8824_set_tdm_slot,

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