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Evan Quanalexdeucher
Evan Quan
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alexdeucher
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drm/amd/powerplay: update swSMU VCN/JPEG PG logics
Add lock protections and avoid unnecessary actions if the PG state is already the same as required. Signed-off-by: Evan Quan <[email protected]> Tested-by: Matt Coffin <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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+60
-34
lines changed

7 files changed

+60
-34
lines changed

‎drivers/gpu/drm/amd/powerplay/amdgpu_smu.c

Lines changed: 56 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -133,6 +133,56 @@ int smu_get_dpm_freq_range(struct smu_context *smu,
133133
return ret;
134134
}
135135

136+
static int smu_dpm_set_vcn_enable(struct smu_context *smu,
137+
bool enable)
138+
{
139+
struct smu_power_context *smu_power = &smu->smu_power;
140+
struct smu_power_gate *power_gate = &smu_power->power_gate;
141+
int ret = 0;
142+
143+
if (!smu->ppt_funcs->dpm_set_vcn_enable)
144+
return 0;
145+
146+
mutex_lock(&power_gate->vcn_gate_lock);
147+
148+
if (atomic_read(&power_gate->vcn_gated) ^ enable)
149+
goto out;
150+
151+
ret = smu->ppt_funcs->dpm_set_vcn_enable(smu, enable);
152+
if (!ret)
153+
atomic_set(&power_gate->vcn_gated, !enable);
154+
155+
out:
156+
mutex_unlock(&power_gate->vcn_gate_lock);
157+
158+
return ret;
159+
}
160+
161+
static int smu_dpm_set_jpeg_enable(struct smu_context *smu,
162+
bool enable)
163+
{
164+
struct smu_power_context *smu_power = &smu->smu_power;
165+
struct smu_power_gate *power_gate = &smu_power->power_gate;
166+
int ret = 0;
167+
168+
if (!smu->ppt_funcs->dpm_set_jpeg_enable)
169+
return 0;
170+
171+
mutex_lock(&power_gate->jpeg_gate_lock);
172+
173+
if (atomic_read(&power_gate->jpeg_gated) ^ enable)
174+
goto out;
175+
176+
ret = smu->ppt_funcs->dpm_set_jpeg_enable(smu, enable);
177+
if (!ret)
178+
atomic_set(&power_gate->jpeg_gated, !enable);
179+
180+
out:
181+
mutex_unlock(&power_gate->jpeg_gate_lock);
182+
183+
return ret;
184+
}
185+
136186
/**
137187
* smu_dpm_set_power_gate - power gate/ungate the specific IP block
138188
*
@@ -649,6 +699,11 @@ static int smu_sw_init(void *handle)
649699
smu->power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
650700
smu->default_power_profile_mode = PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT;
651701

702+
atomic_set(&smu->smu_power.power_gate.vcn_gated, 1);
703+
atomic_set(&smu->smu_power.power_gate.jpeg_gated, 1);
704+
mutex_init(&smu->smu_power.power_gate.vcn_gate_lock);
705+
mutex_init(&smu->smu_power.power_gate.jpeg_gate_lock);
706+
652707
smu->workload_mask = 1 << smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT];
653708
smu->workload_prority[PP_SMC_POWER_PROFILE_BOOTUP_DEFAULT] = 0;
654709
smu->workload_prority[PP_SMC_POWER_PROFILE_FULLSCREEN3D] = 1;
@@ -1973,7 +2028,7 @@ int smu_read_sensor(struct smu_context *smu,
19732028
*size = 4;
19742029
break;
19752030
case AMDGPU_PP_SENSOR_VCN_POWER_STATE:
1976-
*(uint32_t *)data = smu->smu_power.power_gate.vcn_gated ? 0 : 1;
2031+
*(uint32_t *)data = atomic_read(&smu->smu_power.power_gate.vcn_gated) ? 0: 1;
19772032
*size = 4;
19782033
break;
19792034
case AMDGPU_PP_SENSOR_MIN_FAN_RPM:

‎drivers/gpu/drm/amd/powerplay/arcturus_ppt.c

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1849,8 +1849,6 @@ static bool arcturus_is_dpm_running(struct smu_context *smu)
18491849

18501850
static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
18511851
{
1852-
struct smu_power_context *smu_power = &smu->smu_power;
1853-
struct smu_power_gate *power_gate = &smu_power->power_gate;
18541852
int ret = 0;
18551853

18561854
if (enable) {
@@ -1861,7 +1859,6 @@ static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
18611859
return ret;
18621860
}
18631861
}
1864-
power_gate->vcn_gated = false;
18651862
} else {
18661863
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
18671864
ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_VCN_PG_BIT, 0);
@@ -1870,7 +1867,6 @@ static int arcturus_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
18701867
return ret;
18711868
}
18721869
}
1873-
power_gate->vcn_gated = true;
18741870
}
18751871

18761872
return ret;

‎drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -292,8 +292,10 @@ struct smu_dpm_context {
292292
struct smu_power_gate {
293293
bool uvd_gated;
294294
bool vce_gated;
295-
bool vcn_gated;
296-
bool jpeg_gated;
295+
atomic_t vcn_gated;
296+
atomic_t jpeg_gated;
297+
struct mutex vcn_gate_lock;
298+
struct mutex jpeg_gate_lock;
297299
};
298300

299301
struct smu_power_context {

‎drivers/gpu/drm/amd/powerplay/navi10_ppt.c

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -785,8 +785,6 @@ static int navi10_set_default_dpm_table(struct smu_context *smu)
785785

786786
static int navi10_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
787787
{
788-
struct smu_power_context *smu_power = &smu->smu_power;
789-
struct smu_power_gate *power_gate = &smu_power->power_gate;
790788
int ret = 0;
791789

792790
if (enable) {
@@ -796,23 +794,19 @@ static int navi10_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
796794
if (ret)
797795
return ret;
798796
}
799-
power_gate->vcn_gated = false;
800797
} else {
801798
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
802799
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PowerDownVcn, NULL);
803800
if (ret)
804801
return ret;
805802
}
806-
power_gate->vcn_gated = true;
807803
}
808804

809805
return ret;
810806
}
811807

812808
static int navi10_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
813809
{
814-
struct smu_power_context *smu_power = &smu->smu_power;
815-
struct smu_power_gate *power_gate = &smu_power->power_gate;
816810
int ret = 0;
817811

818812
if (enable) {
@@ -821,14 +815,12 @@ static int navi10_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
821815
if (ret)
822816
return ret;
823817
}
824-
power_gate->jpeg_gated = false;
825818
} else {
826819
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) {
827820
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PowerDownJpeg, NULL);
828821
if (ret)
829822
return ret;
830823
}
831-
power_gate->jpeg_gated = true;
832824
}
833825

834826
return ret;

‎drivers/gpu/drm/amd/powerplay/renoir_ppt.c

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -459,8 +459,6 @@ static enum amd_pm_state_type renoir_get_current_power_state(struct smu_context
459459

460460
static int renoir_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
461461
{
462-
struct smu_power_context *smu_power = &smu->smu_power;
463-
struct smu_power_gate *power_gate = &smu_power->power_gate;
464462
int ret = 0;
465463

466464
if (enable) {
@@ -470,23 +468,19 @@ static int renoir_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
470468
if (ret)
471469
return ret;
472470
}
473-
power_gate->vcn_gated = false;
474471
} else {
475472
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_VCN_PG_BIT)) {
476473
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PowerDownVcn, NULL);
477474
if (ret)
478475
return ret;
479476
}
480-
power_gate->vcn_gated = true;
481477
}
482478

483479
return ret;
484480
}
485481

486482
static int renoir_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
487483
{
488-
struct smu_power_context *smu_power = &smu->smu_power;
489-
struct smu_power_gate *power_gate = &smu_power->power_gate;
490484
int ret = 0;
491485

492486
if (enable) {
@@ -495,14 +489,12 @@ static int renoir_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
495489
if (ret)
496490
return ret;
497491
}
498-
power_gate->jpeg_gated = false;
499492
} else {
500493
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_JPEG_PG_BIT)) {
501494
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownJpeg, 0, NULL);
502495
if (ret)
503496
return ret;
504497
}
505-
power_gate->jpeg_gated = true;
506498
}
507499

508500
return ret;

‎drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c

Lines changed: 0 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -766,10 +766,7 @@ static int sienna_cichlid_set_default_dpm_table(struct smu_context *smu)
766766

767767
static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enable)
768768
{
769-
struct smu_power_context *smu_power = &smu->smu_power;
770-
struct smu_power_gate *power_gate = &smu_power->power_gate;
771769
struct amdgpu_device *adev = smu->adev;
772-
773770
int ret = 0;
774771

775772
if (enable) {
@@ -785,7 +782,6 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl
785782
return ret;
786783
}
787784
}
788-
power_gate->vcn_gated = false;
789785
} else {
790786
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) {
791787
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownVcn, 0, NULL);
@@ -798,16 +794,13 @@ static int sienna_cichlid_dpm_set_vcn_enable(struct smu_context *smu, bool enabl
798794
return ret;
799795
}
800796
}
801-
power_gate->vcn_gated = true;
802797
}
803798

804799
return ret;
805800
}
806801

807802
static int sienna_cichlid_dpm_set_jpeg_enable(struct smu_context *smu, bool enable)
808803
{
809-
struct smu_power_context *smu_power = &smu->smu_power;
810-
struct smu_power_gate *power_gate = &smu_power->power_gate;
811804
int ret = 0;
812805

813806
if (enable) {
@@ -816,14 +809,12 @@ static int sienna_cichlid_dpm_set_jpeg_enable(struct smu_context *smu, bool enab
816809
if (ret)
817810
return ret;
818811
}
819-
power_gate->jpeg_gated = false;
820812
} else {
821813
if (smu_cmn_feature_is_enabled(smu, SMU_FEATURE_MM_DPM_PG_BIT)) {
822814
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_PowerDownJpeg, 0, NULL);
823815
if (ret)
824816
return ret;
825817
}
826-
power_gate->jpeg_gated = true;
827818
}
828819

829820
return ret;

‎drivers/gpu/drm/amd/powerplay/smu_internal.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -77,8 +77,6 @@
7777
#define smu_get_dal_power_level(smu, clocks) smu_ppt_funcs(get_dal_power_level, 0, smu, clocks)
7878
#define smu_get_perf_level(smu, designation, level) smu_ppt_funcs(get_perf_level, 0, smu, designation, level)
7979
#define smu_get_current_shallow_sleep_clocks(smu, clocks) smu_ppt_funcs(get_current_shallow_sleep_clocks, 0, smu, clocks)
80-
#define smu_dpm_set_vcn_enable(smu, enable) smu_ppt_funcs(dpm_set_vcn_enable, 0, smu, enable)
81-
#define smu_dpm_set_jpeg_enable(smu, enable) smu_ppt_funcs(dpm_set_jpeg_enable, 0, smu, enable)
8280
#define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, clock_ranges)
8381
#define smu_thermal_temperature_range_update(smu, range, rw) smu_ppt_funcs(thermal_temperature_range_update, 0, smu, range, rw)
8482
#define smu_register_irq_handler(smu) smu_ppt_funcs(register_irq_handler, 0, smu)

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