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lixuzhaJiri Kosina
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HID: intel-ish-hid: ipc: make ish suspend paths clear
For suspend-to-idle, send suspend message and set N0_D3 flag to put the ISH into D0i3 state. For suspend-to-mem, disable the DMA bit before ISH entering D3, and NO_D3 flag is cleared by default, then the ISH would enter D3. Signed-off-by: Zhang Lixu <[email protected]> Acked-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Jiri Kosina <[email protected]>
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drivers/hid/intel-ish-hid/ipc/pci-ish.c

Lines changed: 31 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,8 @@ static void __maybe_unused ish_resume_handler(struct work_struct *work)
223223
* it means ISH isn't powered off, in this case, send a resume message.
224224
*/
225225
if (fwsts >= FWSTS_SENSOR_APP_LOADED) {
226+
disable_irq_wake(pdev->irq);
227+
226228
ishtp_send_resume(dev);
227229

228230
/* Waiting to get resume response */
@@ -255,27 +257,36 @@ static int __maybe_unused ish_suspend(struct device *device)
255257
struct pci_dev *pdev = to_pci_dev(device);
256258
struct ishtp_device *dev = pci_get_drvdata(pdev);
257259

258-
enable_irq_wake(pdev->irq);
259-
/*
260-
* If previous suspend hasn't been asnwered then ISH is likely dead,
261-
* don't attempt nested notification
262-
*/
263-
if (dev->suspend_flag)
264-
return 0;
265-
266-
dev->resume_flag = 0;
267-
dev->suspend_flag = 1;
268-
ishtp_send_suspend(dev);
269-
270-
/* 25 ms should be enough for live ISH to flush all IPC buf */
271-
if (dev->suspend_flag)
272-
wait_event_interruptible_timeout(dev->suspend_wait,
273-
!dev->suspend_flag,
274-
msecs_to_jiffies(25));
275-
276260
if (ish_should_enter_d0i3(pdev)) {
277-
/* Set the NO_D3 flag, the ISH would enter D0i3 */
278-
pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
261+
/*
262+
* If previous suspend hasn't been asnwered then ISH is likely
263+
* dead, don't attempt nested notification
264+
*/
265+
if (dev->suspend_flag)
266+
return 0;
267+
268+
dev->resume_flag = 0;
269+
dev->suspend_flag = 1;
270+
ishtp_send_suspend(dev);
271+
272+
/* 25 ms should be enough for live ISH to flush all IPC buf */
273+
if (dev->suspend_flag)
274+
wait_event_interruptible_timeout(dev->suspend_wait,
275+
!dev->suspend_flag,
276+
msecs_to_jiffies(25));
277+
278+
if (dev->suspend_flag) {
279+
/*
280+
* It looks like FW halt, clear the DMA bit, and put
281+
* ISH into D3, and FW would reset on resume.
282+
*/
283+
ish_disable_dma(dev);
284+
} else {
285+
/* Set the NO_D3 flag, the ISH would enter D0i3 */
286+
pdev->dev_flags |= PCI_DEV_FLAGS_NO_D3;
287+
288+
enable_irq_wake(pdev->irq);
289+
}
279290
} else {
280291
/*
281292
* Clear the DMA bit before putting ISH into D3,
@@ -304,7 +315,6 @@ static int __maybe_unused ish_resume(struct device *device)
304315
ish_resume_device = device;
305316
dev->resume_flag = 1;
306317

307-
disable_irq_wake(pdev->irq);
308318
schedule_work(&resume_work);
309319

310320
return 0;

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