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Merge tag 'mailbox-v5.8' of git://git.linaro.org/landing-teams/working/fujitsu/integration
Pull mailbox updates from Jassi Brar: "qcom: - new controller driver for IPCC - reorg the of_device data - add support for ipq6018 platform spreadtrum: - new sprd controller driver imx: - implement suspend/resume PM support misc: - make pcc driver struct static - fix return value in imx_mu_scu - disable clock before bailout in imx probe - remove duplicate error mssg in zynqmp probe - fix header size in imx.scu - check for null instead of is-err in zynqmp" * tag 'mailbox-v5.8' of git://git.linaro.org/landing-teams/working/fujitsu/integration: mailbox: qcom: Add ipq6018 apcs compatible mailbox: qcom: Add clock driver name in apcs mailbox driver data dt-bindings: mailbox: Add YAML schemas for QCOM APCS global block mailbox: imx: ONLY IPC MU needs IRQF_NO_SUSPEND flag mailbox: imx: Add runtime PM callback to handle MU clocks mailbox: imx: Add context save/restore for suspend/resume MAINTAINERS: Add entry for Qualcomm IPCC driver mailbox: Add support for Qualcomm IPCC dt-bindings: mailbox: Add devicetree binding for Qcom IPCC mailbox: zynqmp-ipi: Fix NULL vs IS_ERR() check in zynqmp_ipi_mbox_probe() mailbox: imx-mailbox: fix scu msg header size check mailbox: sprd: Add Spreadtrum mailbox driver dt-bindings: mailbox: Add the Spreadtrum mailbox documentation mailbox: ZynqMP IPI: Delete an error message in zynqmp_ipi_probe() mailbox: imx: Disable the clock on devm_mbox_controller_register() failure mailbox: imx: Fix return in imx_mu_scu_xlate() mailbox: imx: Support runtime PM mailbox: pcc: make pcc_mbox_driver static
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‎Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.txt

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‎Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Qualcomm APCS global block bindings
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description:
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This binding describes the APCS "global" block found in various Qualcomm
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platforms.
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maintainers:
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- Sivaprakash Murugesan <[email protected]>
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properties:
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compatible:
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enum:
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- qcom,ipq8074-apcs-apps-global
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- qcom,msm8916-apcs-kpss-global
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- qcom,msm8996-apcs-hmss-global
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- qcom,msm8998-apcs-hmss-global
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- qcom,qcs404-apcs-apps-global
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- qcom,sc7180-apss-shared
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- qcom,sdm845-apss-shared
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- qcom,sm8150-apss-shared
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reg:
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maxItems: 1
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clocks:
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description: phandles to the parent clocks of the clock driver
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items:
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- description: primary pll parent of the clock driver
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- description: auxiliary parent
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'#mbox-cells':
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const: 1
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'#clock-cells':
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const: 0
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clock-names:
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items:
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- const: pll
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- const: aux
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required:
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- compatible
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- reg
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- '#mbox-cells'
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additionalProperties: false
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examples:
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# Example apcs with msm8996
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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apcs_glb: mailbox@9820000 {
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compatible = "qcom,msm8996-apcs-hmss-global";
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reg = <0x9820000 0x1000>;
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#mbox-cells = <1>;
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};
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rpm-glink {
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compatible = "qcom,glink-rpm";
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
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qcom,rpm-msg-ram = <&rpm_msg_ram>;
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mboxes = <&apcs_glb 0>;
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mbox-names = "rpm_hlos";
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};
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# Example apcs with qcs404
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- |
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#define GCC_APSS_AHB_CLK_SRC 1
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#define GCC_GPLL0_AO_OUT_MAIN 123
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apcs: mailbox@b011000 {
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compatible = "qcom,qcs404-apcs-apps-global";
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reg = <0x0b011000 0x1000>;
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#mbox-cells = <1>;
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clocks = <&apcs_hfpll>, <&gcc GCC_GPLL0_AO_OUT_MAIN>;
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clock-names = "pll", "aux";
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#clock-cells = <0>;
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};

‎Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml

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# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/qcom-ipcc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Technologies, Inc. Inter-Processor Communication Controller
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maintainers:
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- Manivannan Sadhasivam <[email protected]>
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description:
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The Inter-Processor Communication Controller (IPCC) is a centralized hardware
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to route interrupts across various subsystems. It involves a three-level
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addressing scheme called protocol, client and signal. For example, consider an
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entity on the Application Processor Subsystem (APSS) that wants to listen to
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Modem's interrupts via Shared Memory Point to Point (SMP2P) interface. In such
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a case, the client would be Modem (client-id is 2) and the signal would be
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SMP2P (signal-id is 2). The SMP2P itself falls under the Multiprocessor (MPROC)
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protocol (protocol-id is 0). Refer include/dt-bindings/mailbox/qcom-ipcc.h
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for the list of such IDs.
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properties:
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compatible:
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items:
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- enum:
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- qcom,sm8250-ipcc
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- const: qcom,ipcc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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interrupt-controller: true
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"#interrupt-cells":
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const: 3
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description:
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The first cell is the client-id, the second cell is the signal-id and the
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third cell is the interrupt type.
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"#mbox-cells":
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const: 2
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description:
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The first cell is the client-id, and the second cell is the signal-id.
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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- "#interrupt-cells"
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- "#mbox-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/mailbox/qcom-ipcc.h>
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mailbox@408000 {
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compatible = "qcom,sm8250-ipcc", "qcom,ipcc";
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reg = <0x408000 0x1000>;
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interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <3>;
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#mbox-cells = <2>;
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};
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smp2p-modem {
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compatible = "qcom,smp2p";
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interrupts-extended = <&ipcc_mproc IPCC_CLIENT_MPSS
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IPCC_MPROC_SIGNAL_SMP2P IRQ_TYPE_EDGE_RISING>;
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mboxes = <&ipcc_mproc IPCC_CLIENT_MPSS IPCC_MPROC_SIGNAL_SMP2P>;
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/* Other SMP2P fields */
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};

‎Documentation/devicetree/bindings/mailbox/sprd-mailbox.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/mailbox/sprd-mailbox.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Spreadtrum mailbox controller bindings
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maintainers:
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- Orson Zhai <[email protected]>
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- Baolin Wang <[email protected]>
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- Chunyan Zhang <[email protected]>
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properties:
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compatible:
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enum:
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- sprd,sc9860-mailbox
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reg:
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items:
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- description: inbox registers' base address
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- description: outbox registers' base address
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interrupts:
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items:
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- description: inbox interrupt
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- description: outbox interrupt
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clocks:
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maxItems: 1
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clock-names:
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items:
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- const: enable
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"#mbox-cells":
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- "#mbox-cells"
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- clocks
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- clock-names
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mailbox: mailbox@400a0000 {
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compatible = "sprd,sc9860-mailbox";
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reg = <0 0x400a0000 0 0x8000>, <0 0x400a8000 0 0x8000>;
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#mbox-cells = <1>;
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clock-names = "enable";
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clocks = <&aon_gate 53>;
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interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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};
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...

‎MAINTAINERS

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S: Maintained
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F: drivers/iommu/qcom_iommu.c
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QUALCOMM IPCC MAILBOX DRIVER
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M: Manivannan Sadhasivam <[email protected]>
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L: [email protected]
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S: Supported
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F: Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml
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F: drivers/mailbox/qcom-ipcc.c
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F: include/dt-bindings/mailbox/qcom-ipcc.h
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QUALCOMM RMNET DRIVER
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M: Subash Abhinov Kasiviswanathan <[email protected]>
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M: Sean Tranchetti <[email protected]>

‎drivers/mailbox/Kconfig

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various Allwinner SoCs. This mailbox is used for communication
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between the application CPUs and the power management coprocessor.
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config SPRD_MBOX
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tristate "Spreadtrum Mailbox"
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depends on ARCH_SPRD || COMPILE_TEST
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help
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Mailbox driver implementation for the Spreadtrum platform. It is used
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to send message between application processors and MCU. Say Y here if
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you want to build the Spreatrum mailbox controller driver.
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config QCOM_IPCC
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bool "Qualcomm Technologies, Inc. IPCC driver"
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depends on ARCH_QCOM || COMPILE_TEST
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help
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Qualcomm Technologies, Inc. Inter-Processor Communication Controller
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(IPCC) driver for MSM devices. The driver provides mailbox support for
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sending interrupts to the clients. On the other hand, the driver also
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acts as an interrupt controller for receiving interrupts from clients.
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Say Y here if you want to build this driver.
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endif

‎drivers/mailbox/Makefile

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obj-$(CONFIG_ZYNQMP_IPI_MBOX) += zynqmp-ipi-mailbox.o
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obj-$(CONFIG_SUN6I_MSGBOX) += sun6i-msgbox.o
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obj-$(CONFIG_SPRD_MBOX) += sprd-mailbox.o
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obj-$(CONFIG_QCOM_IPCC) += qcom-ipcc.o

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