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xdarklightjbrun3t
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clk: meson: meson8b: Export the video clocks
Setting the video clocks requires fine-tuned adjustments of various video clocks. Export the required ones to allow changing the video clock for the CVBS and HDMI outputs at runtime. Signed-off-by: Martin Blumenstingl <[email protected]> Signed-off-by: Jerome Brunet <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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+11
-11
lines changed

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+11
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lines changed

drivers/clk/meson/meson8b.h

Lines changed: 1 addition & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -107,14 +107,11 @@
107107
#define CLKID_PERIPH_SEL 125
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#define CLKID_AXI_SEL 127
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#define CLKID_L2_DRAM_SEL 129
110-
#define CLKID_HDMI_PLL_LVDS_OUT 131
111-
#define CLKID_HDMI_PLL_HDMI_OUT 132
110+
#define CLKID_HDMI_PLL_LVDS_OUT 131
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#define CLKID_VID_PLL_IN_SEL 133
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#define CLKID_VID_PLL_IN_EN 134
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#define CLKID_VID_PLL_PRE_DIV 135
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#define CLKID_VID_PLL_POST_DIV 136
116-
#define CLKID_VID_PLL_FINAL_DIV 137
117-
#define CLKID_VCLK_IN_SEL 138
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#define CLKID_VCLK_IN_EN 139
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#define CLKID_VCLK_DIV1 140
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#define CLKID_VCLK_DIV2_DIV 141
@@ -125,7 +122,6 @@
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#define CLKID_VCLK_DIV6 146
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#define CLKID_VCLK_DIV12_DIV 147
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#define CLKID_VCLK_DIV12 148
128-
#define CLKID_VCLK2_IN_SEL 149
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#define CLKID_VCLK2_IN_EN 150
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#define CLKID_VCLK2_DIV1 151
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#define CLKID_VCLK2_DIV2_DIV 152
@@ -137,17 +133,11 @@
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#define CLKID_VCLK2_DIV12_DIV 158
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#define CLKID_VCLK2_DIV12 159
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#define CLKID_CTS_ENCT_SEL 160
140-
#define CLKID_CTS_ENCT 161
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#define CLKID_CTS_ENCP_SEL 162
142-
#define CLKID_CTS_ENCP 163
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#define CLKID_CTS_ENCI_SEL 164
144-
#define CLKID_CTS_ENCI 165
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#define CLKID_HDMI_TX_PIXEL_SEL 166
146-
#define CLKID_HDMI_TX_PIXEL 167
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#define CLKID_CTS_ENCL_SEL 168
148-
#define CLKID_CTS_ENCL 169
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#define CLKID_CTS_VDAC0_SEL 170
150-
#define CLKID_CTS_VDAC0 171
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#define CLKID_HDMI_SYS_SEL 172
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#define CLKID_HDMI_SYS_DIV 173
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#define CLKID_MALI_0_SEL 175

include/dt-bindings/clock/meson8b-clkc.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -105,6 +105,16 @@
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#define CLKID_PERIPH 126
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#define CLKID_AXI 128
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#define CLKID_L2_DRAM 130
108+
#define CLKID_HDMI_PLL_HDMI_OUT 132
109+
#define CLKID_VID_PLL_FINAL_DIV 137
110+
#define CLKID_VCLK_IN_SEL 138
111+
#define CLKID_VCLK2_IN_SEL 149
112+
#define CLKID_CTS_ENCT 161
113+
#define CLKID_CTS_ENCP 163
114+
#define CLKID_CTS_ENCI 165
115+
#define CLKID_HDMI_TX_PIXEL 167
116+
#define CLKID_CTS_ENCL 169
117+
#define CLKID_CTS_VDAC0 171
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#define CLKID_HDMI_SYS 174
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#define CLKID_VPU 190
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#define CLKID_VDEC_1 196

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