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Merge tag 'riscv-for-linus-5.7-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt: "A smattering of fixes and cleanups: - Dead code removal. - Exporting riscv_cpuid_to_hartid_mask for modules. - Per-CPU tracking of ISA features. - Setting max_pfn correctly when probing memory. - Adding a note to the VDSO so glibc can check the kernel's version without a uname(). - A fix to force the bootloader to initialize the boot spin tables, which still get used as a fallback when SBI-0.1 is enabled" * tag 'riscv-for-linus-5.7-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: RISC-V: Remove unused code from STRICT_KERNEL_RWX riscv: force __cpu_up_ variables to put in data section riscv: add Linux note to vdso riscv: set max_pfn to the PFN of the last page RISC-V: Remove N-extension related defines RISC-V: Add bitmap reprensenting ISA features common across CPUs RISC-V: Export riscv_cpuid_to_hartid_mask() API
2 parents 1a263ae + 73cb8e2 commit 2e28f3b

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-34
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9 files changed

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lines changed

arch/riscv/include/asm/csr.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -51,13 +51,10 @@
5151
#define CAUSE_IRQ_FLAG (_AC(1, UL) << (__riscv_xlen - 1))
5252

5353
/* Interrupt causes (minus the high bit) */
54-
#define IRQ_U_SOFT 0
5554
#define IRQ_S_SOFT 1
5655
#define IRQ_M_SOFT 3
57-
#define IRQ_U_TIMER 4
5856
#define IRQ_S_TIMER 5
5957
#define IRQ_M_TIMER 7
60-
#define IRQ_U_EXT 8
6158
#define IRQ_S_EXT 9
6259
#define IRQ_M_EXT 11
6360

arch/riscv/include/asm/hwcap.h

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8,6 +8,7 @@
88
#ifndef _ASM_RISCV_HWCAP_H
99
#define _ASM_RISCV_HWCAP_H
1010

11+
#include <linux/bits.h>
1112
#include <uapi/asm/hwcap.h>
1213

1314
#ifndef __ASSEMBLY__
@@ -22,6 +23,27 @@ enum {
2223
};
2324

2425
extern unsigned long elf_hwcap;
26+
27+
#define RISCV_ISA_EXT_a ('a' - 'a')
28+
#define RISCV_ISA_EXT_c ('c' - 'a')
29+
#define RISCV_ISA_EXT_d ('d' - 'a')
30+
#define RISCV_ISA_EXT_f ('f' - 'a')
31+
#define RISCV_ISA_EXT_h ('h' - 'a')
32+
#define RISCV_ISA_EXT_i ('i' - 'a')
33+
#define RISCV_ISA_EXT_m ('m' - 'a')
34+
#define RISCV_ISA_EXT_s ('s' - 'a')
35+
#define RISCV_ISA_EXT_u ('u' - 'a')
36+
37+
#define RISCV_ISA_EXT_MAX 64
38+
39+
unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap);
40+
41+
#define riscv_isa_extension_mask(ext) BIT_MASK(RISCV_ISA_EXT_##ext)
42+
43+
bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit);
44+
#define riscv_isa_extension_available(isa_bitmap, ext) \
45+
__riscv_isa_extension_available(isa_bitmap, RISCV_ISA_EXT_##ext)
46+
2547
#endif
2648

2749
#endif /* _ASM_RISCV_HWCAP_H */

arch/riscv/include/asm/set_memory.h

Lines changed: 0 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -22,14 +22,6 @@ static inline int set_memory_x(unsigned long addr, int numpages) { return 0; }
2222
static inline int set_memory_nx(unsigned long addr, int numpages) { return 0; }
2323
#endif
2424

25-
#ifdef CONFIG_STRICT_KERNEL_RWX
26-
void set_kernel_text_ro(void);
27-
void set_kernel_text_rw(void);
28-
#else
29-
static inline void set_kernel_text_ro(void) { }
30-
static inline void set_kernel_text_rw(void) { }
31-
#endif
32-
3325
int set_direct_map_invalid_noflush(struct page *page);
3426
int set_direct_map_default_noflush(struct page *page);
3527

arch/riscv/kernel/cpu_ops.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -15,8 +15,8 @@
1515

1616
const struct cpu_operations *cpu_ops[NR_CPUS] __ro_after_init;
1717

18-
void *__cpu_up_stack_pointer[NR_CPUS];
19-
void *__cpu_up_task_pointer[NR_CPUS];
18+
void *__cpu_up_stack_pointer[NR_CPUS] __section(.data);
19+
void *__cpu_up_task_pointer[NR_CPUS] __section(.data);
2020

2121
extern const struct cpu_operations cpu_ops_sbi;
2222
extern const struct cpu_operations cpu_ops_spinwait;

arch/riscv/kernel/cpufeature.c

Lines changed: 80 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,22 +6,65 @@
66
* Copyright (C) 2017 SiFive
77
*/
88

9+
#include <linux/bitmap.h>
910
#include <linux/of.h>
1011
#include <asm/processor.h>
1112
#include <asm/hwcap.h>
1213
#include <asm/smp.h>
1314
#include <asm/switch_to.h>
1415

1516
unsigned long elf_hwcap __read_mostly;
17+
18+
/* Host ISA bitmap */
19+
static DECLARE_BITMAP(riscv_isa, RISCV_ISA_EXT_MAX) __read_mostly;
20+
1621
#ifdef CONFIG_FPU
1722
bool has_fpu __read_mostly;
1823
#endif
1924

25+
/**
26+
* riscv_isa_extension_base() - Get base extension word
27+
*
28+
* @isa_bitmap: ISA bitmap to use
29+
* Return: base extension word as unsigned long value
30+
*
31+
* NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
32+
*/
33+
unsigned long riscv_isa_extension_base(const unsigned long *isa_bitmap)
34+
{
35+
if (!isa_bitmap)
36+
return riscv_isa[0];
37+
return isa_bitmap[0];
38+
}
39+
EXPORT_SYMBOL_GPL(riscv_isa_extension_base);
40+
41+
/**
42+
* __riscv_isa_extension_available() - Check whether given extension
43+
* is available or not
44+
*
45+
* @isa_bitmap: ISA bitmap to use
46+
* @bit: bit position of the desired extension
47+
* Return: true or false
48+
*
49+
* NOTE: If isa_bitmap is NULL then Host ISA bitmap will be used.
50+
*/
51+
bool __riscv_isa_extension_available(const unsigned long *isa_bitmap, int bit)
52+
{
53+
const unsigned long *bmap = (isa_bitmap) ? isa_bitmap : riscv_isa;
54+
55+
if (bit >= RISCV_ISA_EXT_MAX)
56+
return false;
57+
58+
return test_bit(bit, bmap) ? true : false;
59+
}
60+
EXPORT_SYMBOL_GPL(__riscv_isa_extension_available);
61+
2062
void riscv_fill_hwcap(void)
2163
{
2264
struct device_node *node;
2365
const char *isa;
24-
size_t i;
66+
char print_str[BITS_PER_LONG + 1];
67+
size_t i, j, isa_len;
2568
static unsigned long isa2hwcap[256] = {0};
2669

2770
isa2hwcap['i'] = isa2hwcap['I'] = COMPAT_HWCAP_ISA_I;
@@ -33,8 +76,11 @@ void riscv_fill_hwcap(void)
3376

3477
elf_hwcap = 0;
3578

79+
bitmap_zero(riscv_isa, RISCV_ISA_EXT_MAX);
80+
3681
for_each_of_cpu_node(node) {
3782
unsigned long this_hwcap = 0;
83+
unsigned long this_isa = 0;
3884

3985
if (riscv_of_processor_hartid(node) < 0)
4086
continue;
@@ -44,8 +90,24 @@ void riscv_fill_hwcap(void)
4490
continue;
4591
}
4692

47-
for (i = 0; i < strlen(isa); ++i)
93+
i = 0;
94+
isa_len = strlen(isa);
95+
#if IS_ENABLED(CONFIG_32BIT)
96+
if (!strncmp(isa, "rv32", 4))
97+
i += 4;
98+
#elif IS_ENABLED(CONFIG_64BIT)
99+
if (!strncmp(isa, "rv64", 4))
100+
i += 4;
101+
#endif
102+
for (; i < isa_len; ++i) {
48103
this_hwcap |= isa2hwcap[(unsigned char)(isa[i])];
104+
/*
105+
* TODO: X, Y and Z extension parsing for Host ISA
106+
* bitmap will be added in-future.
107+
*/
108+
if ('a' <= isa[i] && isa[i] < 'x')
109+
this_isa |= (1UL << (isa[i] - 'a'));
110+
}
49111

50112
/*
51113
* All "okay" hart should have same isa. Set HWCAP based on
@@ -56,6 +118,11 @@ void riscv_fill_hwcap(void)
56118
elf_hwcap &= this_hwcap;
57119
else
58120
elf_hwcap = this_hwcap;
121+
122+
if (riscv_isa[0])
123+
riscv_isa[0] &= this_isa;
124+
else
125+
riscv_isa[0] = this_isa;
59126
}
60127

61128
/* We don't support systems with F but without D, so mask those out
@@ -65,7 +132,17 @@ void riscv_fill_hwcap(void)
65132
elf_hwcap &= ~COMPAT_HWCAP_ISA_F;
66133
}
67134

68-
pr_info("elf_hwcap is 0x%lx\n", elf_hwcap);
135+
memset(print_str, 0, sizeof(print_str));
136+
for (i = 0, j = 0; i < BITS_PER_LONG; i++)
137+
if (riscv_isa[0] & BIT_MASK(i))
138+
print_str[j++] = (char)('a' + i);
139+
pr_info("riscv: ISA extensions %s\n", print_str);
140+
141+
memset(print_str, 0, sizeof(print_str));
142+
for (i = 0, j = 0; i < BITS_PER_LONG; i++)
143+
if (elf_hwcap & BIT_MASK(i))
144+
print_str[j++] = (char)('a' + i);
145+
pr_info("riscv: ELF capabilities %s\n", print_str);
69146

70147
#ifdef CONFIG_FPU
71148
if (elf_hwcap & (COMPAT_HWCAP_ISA_F | COMPAT_HWCAP_ISA_D))

arch/riscv/kernel/smp.c

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Original file line numberDiff line numberDiff line change
@@ -10,6 +10,7 @@
1010

1111
#include <linux/cpu.h>
1212
#include <linux/interrupt.h>
13+
#include <linux/module.h>
1314
#include <linux/profile.h>
1415
#include <linux/smp.h>
1516
#include <linux/sched.h>
@@ -63,6 +64,7 @@ void riscv_cpuid_to_hartid_mask(const struct cpumask *in, struct cpumask *out)
6364
for_each_cpu(cpu, in)
6465
cpumask_set_cpu(cpuid_to_hartid_map(cpu), out);
6566
}
67+
EXPORT_SYMBOL_GPL(riscv_cpuid_to_hartid_mask);
6668

6769
bool arch_match_cpu_phys_id(int cpu, u64 phys_id)
6870
{

arch/riscv/kernel/vdso/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,7 +12,7 @@ vdso-syms += getcpu
1212
vdso-syms += flush_icache
1313

1414
# Files to link into the vdso
15-
obj-vdso = $(patsubst %, %.o, $(vdso-syms))
15+
obj-vdso = $(patsubst %, %.o, $(vdso-syms)) note.o
1616

1717
# Build rules
1818
targets := $(obj-vdso) vdso.so vdso.so.dbg vdso.lds vdso-dummy.o

arch/riscv/kernel/vdso/note.S

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
/* SPDX-License-Identifier: GPL-2.0-or-later */
2+
/*
3+
* This supplies .note.* sections to go into the PT_NOTE inside the vDSO text.
4+
* Here we can supply some information useful to userland.
5+
*/
6+
7+
#include <linux/elfnote.h>
8+
#include <linux/version.h>
9+
10+
ELFNOTE_START(Linux, 0, "a")
11+
.long LINUX_VERSION_CODE
12+
ELFNOTE_END

arch/riscv/mm/init.c

Lines changed: 2 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -150,7 +150,8 @@ void __init setup_bootmem(void)
150150
memblock_reserve(vmlinux_start, vmlinux_end - vmlinux_start);
151151

152152
set_max_mapnr(PFN_DOWN(mem_size));
153-
max_low_pfn = PFN_DOWN(memblock_end_of_DRAM());
153+
max_pfn = PFN_DOWN(memblock_end_of_DRAM());
154+
max_low_pfn = max_pfn;
154155

155156
#ifdef CONFIG_BLK_DEV_INITRD
156157
setup_initrd();
@@ -501,22 +502,6 @@ static inline void setup_vm_final(void)
501502
#endif /* CONFIG_MMU */
502503

503504
#ifdef CONFIG_STRICT_KERNEL_RWX
504-
void set_kernel_text_rw(void)
505-
{
506-
unsigned long text_start = (unsigned long)_text;
507-
unsigned long text_end = (unsigned long)_etext;
508-
509-
set_memory_rw(text_start, (text_end - text_start) >> PAGE_SHIFT);
510-
}
511-
512-
void set_kernel_text_ro(void)
513-
{
514-
unsigned long text_start = (unsigned long)_text;
515-
unsigned long text_end = (unsigned long)_etext;
516-
517-
set_memory_ro(text_start, (text_end - text_start) >> PAGE_SHIFT);
518-
}
519-
520505
void mark_rodata_ro(void)
521506
{
522507
unsigned long text_start = (unsigned long)_text;

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