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Merge tag 'drm-fixes-2024-06-07' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "Weekly fixes: vmwgfx leads the way this week, with minor changes in xe and amdgpu and a couple of other small fixes. Seems quiet enough. xe: - Update the LMTT when freeing VF GT config amdgpu: - Fix shutdown issues on some SMU 13.x platforms - Silence some UBSAN flexible array warnings panel: - sitronix-st7789v: handle of_drm_get_panel_orientation failing error vmwgfx: - filter modes greater than available graphics memory - fix 3D vs STDU enable - remove STDU logic from mode valid - logging fix - memcmp pointers fix - remove unused struct - screen target lifetime fix komeda: - unused struct removal" * tag 'drm-fixes-2024-06-07' of https://gitlab.freedesktop.org/drm/kernel: drm/vmwgfx: Don't memcmp equivalent pointers drm/vmwgfx: remove unused struct 'vmw_stdu_dma' drm/vmwgfx: Don't destroy Screen Target when CRTC is enabled but inactive drm/vmwgfx: Standardize use of kibibytes when logging drm/vmwgfx: Remove STDU logic from generic mode_valid function drm/vmwgfx: 3D disabled should not effect STDU memory limits drm/vmwgfx: Filter modes which exceed graphics memory drm/amdgpu/pptable: Fix UBSAN array-index-out-of-bounds drm/amd: Fix shutdown (again) on some SMU v13.0.4/11 platforms drm/xe/pf: Update the LMTT when freeing VF GT config drm/panel: sitronix-st7789v: Add check for of_drm_get_panel_orientation drm/komeda: remove unused struct 'gamma_curve_segment'
2 parents 8a92980 + eb55943 commit 2e32d58

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‎drivers/gpu/drm/amd/include/pptable.h

Lines changed: 49 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -477,31 +477,30 @@ typedef struct _ATOM_PPLIB_STATE_V2
477477
} ATOM_PPLIB_STATE_V2;
478478

479479
typedef struct _StateArray{
480-
//how many states we have
481-
UCHAR ucNumEntries;
482-
483-
ATOM_PPLIB_STATE_V2 states[1];
480+
//how many states we have
481+
UCHAR ucNumEntries;
482+
483+
ATOM_PPLIB_STATE_V2 states[] /* __counted_by(ucNumEntries) */;
484484
}StateArray;
485485

486486

487487
typedef struct _ClockInfoArray{
488-
//how many clock levels we have
489-
UCHAR ucNumEntries;
490-
491-
//sizeof(ATOM_PPLIB_CLOCK_INFO)
492-
UCHAR ucEntrySize;
493-
494-
UCHAR clockInfo[];
488+
//how many clock levels we have
489+
UCHAR ucNumEntries;
490+
491+
//sizeof(ATOM_PPLIB_CLOCK_INFO)
492+
UCHAR ucEntrySize;
493+
494+
UCHAR clockInfo[];
495495
}ClockInfoArray;
496496

497497
typedef struct _NonClockInfoArray{
498+
//how many non-clock levels we have. normally should be same as number of states
499+
UCHAR ucNumEntries;
500+
//sizeof(ATOM_PPLIB_NONCLOCK_INFO)
501+
UCHAR ucEntrySize;
498502

499-
//how many non-clock levels we have. normally should be same as number of states
500-
UCHAR ucNumEntries;
501-
//sizeof(ATOM_PPLIB_NONCLOCK_INFO)
502-
UCHAR ucEntrySize;
503-
504-
ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[];
503+
ATOM_PPLIB_NONCLOCK_INFO nonClockInfo[] __counted_by(ucNumEntries);
505504
}NonClockInfoArray;
506505

507506
typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
@@ -513,8 +512,10 @@ typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Record
513512

514513
typedef struct _ATOM_PPLIB_Clock_Voltage_Dependency_Table
515514
{
516-
UCHAR ucNumEntries; // Number of entries.
517-
ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[1]; // Dynamically allocate entries.
515+
// Number of entries.
516+
UCHAR ucNumEntries;
517+
// Dynamically allocate entries.
518+
ATOM_PPLIB_Clock_Voltage_Dependency_Record entries[] __counted_by(ucNumEntries);
518519
}ATOM_PPLIB_Clock_Voltage_Dependency_Table;
519520

520521
typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record
@@ -529,8 +530,10 @@ typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Record
529530

530531
typedef struct _ATOM_PPLIB_Clock_Voltage_Limit_Table
531532
{
532-
UCHAR ucNumEntries; // Number of entries.
533-
ATOM_PPLIB_Clock_Voltage_Limit_Record entries[1]; // Dynamically allocate entries.
533+
// Number of entries.
534+
UCHAR ucNumEntries;
535+
// Dynamically allocate entries.
536+
ATOM_PPLIB_Clock_Voltage_Limit_Record entries[] __counted_by(ucNumEntries);
534537
}ATOM_PPLIB_Clock_Voltage_Limit_Table;
535538

536539
union _ATOM_PPLIB_CAC_Leakage_Record
@@ -553,8 +556,10 @@ typedef union _ATOM_PPLIB_CAC_Leakage_Record ATOM_PPLIB_CAC_Leakage_Record;
553556

554557
typedef struct _ATOM_PPLIB_CAC_Leakage_Table
555558
{
556-
UCHAR ucNumEntries; // Number of entries.
557-
ATOM_PPLIB_CAC_Leakage_Record entries[1]; // Dynamically allocate entries.
559+
// Number of entries.
560+
UCHAR ucNumEntries;
561+
// Dynamically allocate entries.
562+
ATOM_PPLIB_CAC_Leakage_Record entries[] __counted_by(ucNumEntries);
558563
}ATOM_PPLIB_CAC_Leakage_Table;
559564

560565
typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record
@@ -568,8 +573,10 @@ typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Record
568573

569574
typedef struct _ATOM_PPLIB_PhaseSheddingLimits_Table
570575
{
571-
UCHAR ucNumEntries; // Number of entries.
572-
ATOM_PPLIB_PhaseSheddingLimits_Record entries[1]; // Dynamically allocate entries.
576+
// Number of entries.
577+
UCHAR ucNumEntries;
578+
// Dynamically allocate entries.
579+
ATOM_PPLIB_PhaseSheddingLimits_Record entries[] __counted_by(ucNumEntries);
573580
}ATOM_PPLIB_PhaseSheddingLimits_Table;
574581

575582
typedef struct _VCEClockInfo{
@@ -580,8 +587,8 @@ typedef struct _VCEClockInfo{
580587
}VCEClockInfo;
581588

582589
typedef struct _VCEClockInfoArray{
583-
UCHAR ucNumEntries;
584-
VCEClockInfo entries[1];
590+
UCHAR ucNumEntries;
591+
VCEClockInfo entries[] __counted_by(ucNumEntries);
585592
}VCEClockInfoArray;
586593

587594
typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record
@@ -592,8 +599,8 @@ typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record
592599

593600
typedef struct _ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table
594601
{
595-
UCHAR numEntries;
596-
ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[1];
602+
UCHAR numEntries;
603+
ATOM_PPLIB_VCE_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries);
597604
}ATOM_PPLIB_VCE_Clock_Voltage_Limit_Table;
598605

599606
typedef struct _ATOM_PPLIB_VCE_State_Record
@@ -604,8 +611,8 @@ typedef struct _ATOM_PPLIB_VCE_State_Record
604611

605612
typedef struct _ATOM_PPLIB_VCE_State_Table
606613
{
607-
UCHAR numEntries;
608-
ATOM_PPLIB_VCE_State_Record entries[1];
614+
UCHAR numEntries;
615+
ATOM_PPLIB_VCE_State_Record entries[] __counted_by(numEntries);
609616
}ATOM_PPLIB_VCE_State_Table;
610617

611618

@@ -626,8 +633,8 @@ typedef struct _UVDClockInfo{
626633
}UVDClockInfo;
627634

628635
typedef struct _UVDClockInfoArray{
629-
UCHAR ucNumEntries;
630-
UVDClockInfo entries[1];
636+
UCHAR ucNumEntries;
637+
UVDClockInfo entries[] __counted_by(ucNumEntries);
631638
}UVDClockInfoArray;
632639

633640
typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record
@@ -638,8 +645,8 @@ typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record
638645

639646
typedef struct _ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table
640647
{
641-
UCHAR numEntries;
642-
ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[1];
648+
UCHAR numEntries;
649+
ATOM_PPLIB_UVD_Clock_Voltage_Limit_Record entries[] __counted_by(numEntries);
643650
}ATOM_PPLIB_UVD_Clock_Voltage_Limit_Table;
644651

645652
typedef struct _ATOM_PPLIB_UVD_Table
@@ -657,8 +664,8 @@ typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Record
657664
}ATOM_PPLIB_SAMClk_Voltage_Limit_Record;
658665

659666
typedef struct _ATOM_PPLIB_SAMClk_Voltage_Limit_Table{
660-
UCHAR numEntries;
661-
ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[];
667+
UCHAR numEntries;
668+
ATOM_PPLIB_SAMClk_Voltage_Limit_Record entries[] __counted_by(numEntries);
662669
}ATOM_PPLIB_SAMClk_Voltage_Limit_Table;
663670

664671
typedef struct _ATOM_PPLIB_SAMU_Table
@@ -675,8 +682,8 @@ typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Record
675682
}ATOM_PPLIB_ACPClk_Voltage_Limit_Record;
676683

677684
typedef struct _ATOM_PPLIB_ACPClk_Voltage_Limit_Table{
678-
UCHAR numEntries;
679-
ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[1];
685+
UCHAR numEntries;
686+
ATOM_PPLIB_ACPClk_Voltage_Limit_Record entries[] __counted_by(numEntries);
680687
}ATOM_PPLIB_ACPClk_Voltage_Limit_Table;
681688

682689
typedef struct _ATOM_PPLIB_ACP_Table
@@ -743,9 +750,9 @@ typedef struct ATOM_PPLIB_VQ_Budgeting_Record{
743750
} ATOM_PPLIB_VQ_Budgeting_Record;
744751

745752
typedef struct ATOM_PPLIB_VQ_Budgeting_Table {
746-
UCHAR revid;
747-
UCHAR numEntries;
748-
ATOM_PPLIB_VQ_Budgeting_Record entries[1];
753+
UCHAR revid;
754+
UCHAR numEntries;
755+
ATOM_PPLIB_VQ_Budgeting_Record entries[] __counted_by(numEntries);
749756
} ATOM_PPLIB_VQ_Budgeting_Table;
750757

751758
#pragma pack()

‎drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_4_ppt.c

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -226,15 +226,17 @@ static int smu_v13_0_4_system_features_control(struct smu_context *smu, bool en)
226226
struct amdgpu_device *adev = smu->adev;
227227
int ret = 0;
228228

229-
if (!en && adev->in_s4) {
230-
/* Adds a GFX reset as workaround just before sending the
231-
* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
232-
* an invalid state.
233-
*/
234-
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
235-
SMU_RESET_MODE_2, NULL);
236-
if (ret)
237-
return ret;
229+
if (!en && !adev->in_s0ix) {
230+
if (adev->in_s4) {
231+
/* Adds a GFX reset as workaround just before sending the
232+
* MP1_UNLOAD message to prevent GC/RLC/PMFW from entering
233+
* an invalid state.
234+
*/
235+
ret = smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_GfxDeviceDriverReset,
236+
SMU_RESET_MODE_2, NULL);
237+
if (ret)
238+
return ret;
239+
}
238240

239241
ret = smu_cmn_send_smc_msg(smu, SMU_MSG_PrepareMp1ForUnload, NULL);
240242
}

‎drivers/gpu/drm/arm/display/komeda/komeda_color_mgmt.c

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -72,11 +72,6 @@ struct gamma_curve_sector {
7272
u32 segment_width;
7373
};
7474

75-
struct gamma_curve_segment {
76-
u32 start;
77-
u32 end;
78-
};
79-
8075
static struct gamma_curve_sector sector_tbl[] = {
8176
{ 0, 4, 4 },
8277
{ 16, 4, 4 },

‎drivers/gpu/drm/panel/panel-sitronix-st7789v.c

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -643,7 +643,9 @@ static int st7789v_probe(struct spi_device *spi)
643643
if (ret)
644644
return dev_err_probe(dev, ret, "Failed to get backlight\n");
645645

646-
of_drm_get_panel_orientation(spi->dev.of_node, &ctx->orientation);
646+
ret = of_drm_get_panel_orientation(spi->dev.of_node, &ctx->orientation);
647+
if (ret)
648+
return dev_err_probe(&spi->dev, ret, "Failed to get orientation\n");
647649

648650
drm_panel_add(&ctx->panel);
649651

‎drivers/gpu/drm/vmwgfx/vmwgfx_drv.c

Lines changed: 6 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -746,7 +746,7 @@ static int vmw_setup_pci_resources(struct vmw_private *dev,
746746
dev->vram_size = pci_resource_len(pdev, 2);
747747

748748
drm_info(&dev->drm,
749-
"Register MMIO at 0x%pa size is %llu kiB\n",
749+
"Register MMIO at 0x%pa size is %llu KiB\n",
750750
&rmmio_start, (uint64_t)rmmio_size / 1024);
751751
dev->rmmio = devm_ioremap(dev->drm.dev,
752752
rmmio_start,
@@ -765,7 +765,7 @@ static int vmw_setup_pci_resources(struct vmw_private *dev,
765765
fifo_size = pci_resource_len(pdev, 2);
766766

767767
drm_info(&dev->drm,
768-
"FIFO at %pa size is %llu kiB\n",
768+
"FIFO at %pa size is %llu KiB\n",
769769
&fifo_start, (uint64_t)fifo_size / 1024);
770770
dev->fifo_mem = devm_memremap(dev->drm.dev,
771771
fifo_start,
@@ -790,7 +790,7 @@ static int vmw_setup_pci_resources(struct vmw_private *dev,
790790
* SVGA_REG_VRAM_SIZE.
791791
*/
792792
drm_info(&dev->drm,
793-
"VRAM at %pa size is %llu kiB\n",
793+
"VRAM at %pa size is %llu KiB\n",
794794
&dev->vram_start, (uint64_t)dev->vram_size / 1024);
795795

796796
return 0;
@@ -960,13 +960,6 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
960960
vmw_read(dev_priv,
961961
SVGA_REG_SUGGESTED_GBOBJECT_MEM_SIZE_KB);
962962

963-
/*
964-
* Workaround for low memory 2D VMs to compensate for the
965-
* allocation taken by fbdev
966-
*/
967-
if (!(dev_priv->capabilities & SVGA_CAP_3D))
968-
mem_size *= 3;
969-
970963
dev_priv->max_mob_pages = mem_size * 1024 / PAGE_SIZE;
971964
dev_priv->max_primary_mem =
972965
vmw_read(dev_priv, SVGA_REG_MAX_PRIMARY_MEM);
@@ -991,13 +984,13 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
991984
dev_priv->max_primary_mem = dev_priv->vram_size;
992985
}
993986
drm_info(&dev_priv->drm,
994-
"Legacy memory limits: VRAM = %llu kB, FIFO = %llu kB, surface = %u kB\n",
987+
"Legacy memory limits: VRAM = %llu KiB, FIFO = %llu KiB, surface = %u KiB\n",
995988
(u64)dev_priv->vram_size / 1024,
996989
(u64)dev_priv->fifo_mem_size / 1024,
997990
dev_priv->memory_size / 1024);
998991

999992
drm_info(&dev_priv->drm,
1000-
"MOB limits: max mob size = %u kB, max mob pages = %u\n",
993+
"MOB limits: max mob size = %u KiB, max mob pages = %u\n",
1001994
dev_priv->max_mob_size / 1024, dev_priv->max_mob_pages);
1002995

1003996
ret = vmw_dma_masks(dev_priv);
@@ -1015,7 +1008,7 @@ static int vmw_driver_load(struct vmw_private *dev_priv, u32 pci_id)
10151008
(unsigned)dev_priv->max_gmr_pages);
10161009
}
10171010
drm_info(&dev_priv->drm,
1018-
"Maximum display memory size is %llu kiB\n",
1011+
"Maximum display memory size is %llu KiB\n",
10191012
(uint64_t)dev_priv->max_primary_mem / 1024);
10201013

10211014
/* Need mmio memory to check for fifo pitchlock cap. */

‎drivers/gpu/drm/vmwgfx/vmwgfx_drv.h

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1043,9 +1043,6 @@ void vmw_kms_cursor_snoop(struct vmw_surface *srf,
10431043
int vmw_kms_write_svga(struct vmw_private *vmw_priv,
10441044
unsigned width, unsigned height, unsigned pitch,
10451045
unsigned bpp, unsigned depth);
1046-
bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1047-
uint32_t pitch,
1048-
uint32_t height);
10491046
int vmw_kms_present(struct vmw_private *dev_priv,
10501047
struct drm_file *file_priv,
10511048
struct vmw_framebuffer *vfb,

‎drivers/gpu/drm/vmwgfx/vmwgfx_gmrid_manager.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -94,14 +94,14 @@ static int vmw_gmrid_man_get_node(struct ttm_resource_manager *man,
9494
} else
9595
new_max_pages = gman->max_gmr_pages * 2;
9696
if (new_max_pages > gman->max_gmr_pages && new_max_pages >= gman->used_gmr_pages) {
97-
DRM_WARN("vmwgfx: increasing guest mob limits to %u kB.\n",
97+
DRM_WARN("vmwgfx: increasing guest mob limits to %u KiB.\n",
9898
((new_max_pages) << (PAGE_SHIFT - 10)));
9999

100100
gman->max_gmr_pages = new_max_pages;
101101
} else {
102102
char buf[256];
103103
snprintf(buf, sizeof(buf),
104-
"vmwgfx, error: guest graphics is out of memory (mob limit at: %ukB).\n",
104+
"vmwgfx, error: guest graphics is out of memory (mob limit at: %u KiB).\n",
105105
((gman->max_gmr_pages) << (PAGE_SHIFT - 10)));
106106
vmw_host_printf(buf);
107107
DRM_WARN("%s", buf);

‎drivers/gpu/drm/vmwgfx/vmwgfx_kms.c

Lines changed: 10 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -224,7 +224,7 @@ static bool vmw_du_cursor_plane_has_changed(struct vmw_plane_state *old_vps,
224224
new_image = vmw_du_cursor_plane_acquire_image(new_vps);
225225

226226
changed = false;
227-
if (old_image && new_image)
227+
if (old_image && new_image && old_image != new_image)
228228
changed = memcmp(old_image, new_image, size) != 0;
229229

230230
return changed;
@@ -2171,13 +2171,12 @@ int vmw_kms_write_svga(struct vmw_private *vmw_priv,
21712171
return 0;
21722172
}
21732173

2174+
static
21742175
bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
2175-
uint32_t pitch,
2176-
uint32_t height)
2176+
u64 pitch,
2177+
u64 height)
21772178
{
2178-
return ((u64) pitch * (u64) height) < (u64)
2179-
((dev_priv->active_display_unit == vmw_du_screen_target) ?
2180-
dev_priv->max_primary_mem : dev_priv->vram_size);
2179+
return (pitch * height) < (u64)dev_priv->vram_size;
21812180
}
21822181

21832182
/**
@@ -2873,25 +2872,18 @@ int vmw_du_helper_plane_update(struct vmw_du_update_plane *update)
28732872
enum drm_mode_status vmw_connector_mode_valid(struct drm_connector *connector,
28742873
struct drm_display_mode *mode)
28752874
{
2875+
enum drm_mode_status ret;
28762876
struct drm_device *dev = connector->dev;
28772877
struct vmw_private *dev_priv = vmw_priv(dev);
2878-
u32 max_width = dev_priv->texture_max_width;
2879-
u32 max_height = dev_priv->texture_max_height;
28802878
u32 assumed_cpp = 4;
28812879

28822880
if (dev_priv->assume_16bpp)
28832881
assumed_cpp = 2;
28842882

2885-
if (dev_priv->active_display_unit == vmw_du_screen_target) {
2886-
max_width = min(dev_priv->stdu_max_width, max_width);
2887-
max_height = min(dev_priv->stdu_max_height, max_height);
2888-
}
2889-
2890-
if (max_width < mode->hdisplay)
2891-
return MODE_BAD_HVALUE;
2892-
2893-
if (max_height < mode->vdisplay)
2894-
return MODE_BAD_VVALUE;
2883+
ret = drm_mode_validate_size(mode, dev_priv->texture_max_width,
2884+
dev_priv->texture_max_height);
2885+
if (ret != MODE_OK)
2886+
return ret;
28952887

28962888
if (!vmw_kms_validate_mode_vram(dev_priv,
28972889
mode->hdisplay * assumed_cpp,

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