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9 | 9 | *
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10 | 10 | * Limitations:
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11 | 11 | * - The writes to registers for period and duty are shadowed until
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12 |
| - * LOAD_CONFIG is written to AXI_PWMGEN_REG_CONFIG, at which point |
| 12 | + * LOAD_CONFIG is written to AXI_PWMGEN_REG_RSTN, at which point |
13 | 13 | * they take effect.
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14 | 14 | * - Writing LOAD_CONFIG also has the effect of re-synchronizing all
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15 | 15 | * enabled channels, which could cause glitching on other channels. It
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33 | 33 | #define AXI_PWMGEN_REG_ID 0x04
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34 | 34 | #define AXI_PWMGEN_REG_SCRATCHPAD 0x08
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35 | 35 | #define AXI_PWMGEN_REG_CORE_MAGIC 0x0C
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36 |
| -#define AXI_PWMGEN_REG_CONFIG 0x10 |
| 36 | +#define AXI_PWMGEN_REG_RSTN 0x10 |
| 37 | +#define AXI_PWMGEN_REG_RSTN_LOAD_CONFIG BIT(1) |
| 38 | +#define AXI_PWMGEN_REG_RSTN_RESET BIT(0) |
37 | 39 | #define AXI_PWMGEN_REG_NPWM 0x14
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38 | 40 | #define AXI_PWMGEN_CHX_PERIOD(ch) (0x40 + (4 * (ch)))
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39 | 41 | #define AXI_PWMGEN_CHX_DUTY(ch) (0x80 + (4 * (ch)))
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40 | 42 | #define AXI_PWMGEN_CHX_OFFSET(ch) (0xC0 + (4 * (ch)))
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41 | 43 | #define AXI_PWMGEN_REG_CORE_MAGIC_VAL 0x601A3471 /* Identification number to test during setup */
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42 |
| -#define AXI_PWMGEN_LOAD_CONFIG BIT(1) |
43 |
| -#define AXI_PWMGEN_REG_CONFIG_RESET BIT(0) |
44 | 44 |
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45 | 45 | struct axi_pwmgen_ddata {
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46 | 46 | struct regmap *regmap;
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@@ -152,7 +152,7 @@ static int axi_pwmgen_write_waveform(struct pwm_chip *chip,
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152 | 152 | if (ret)
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153 | 153 | return ret;
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154 | 154 |
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155 |
| - return regmap_write(regmap, AXI_PWMGEN_REG_CONFIG, AXI_PWMGEN_LOAD_CONFIG); |
| 155 | + return regmap_write(regmap, AXI_PWMGEN_REG_RSTN, AXI_PWMGEN_REG_RSTN_LOAD_CONFIG); |
156 | 156 | }
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157 | 157 |
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158 | 158 | static int axi_pwmgen_read_waveform(struct pwm_chip *chip,
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@@ -223,7 +223,7 @@ static int axi_pwmgen_setup(struct regmap *regmap, struct device *dev)
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223 | 223 | }
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224 | 224 |
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225 | 225 | /* Enable the core */
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226 |
| - ret = regmap_clear_bits(regmap, AXI_PWMGEN_REG_CONFIG, AXI_PWMGEN_REG_CONFIG_RESET); |
| 226 | + ret = regmap_clear_bits(regmap, AXI_PWMGEN_REG_RSTN, AXI_PWMGEN_REG_RSTN_RESET); |
227 | 227 | if (ret)
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228 | 228 | return ret;
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229 | 229 |
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