Skip to content

Commit 2faf153

Browse files
KAGA-KOKOsuryasaimadhu
authored andcommitted
x86/tlb: Move __flush_tlb() out of line
cpu_tlbstate is exported because various TLB-related functions need access to it, but cpu_tlbstate is sensitive information which should only be accessed by well-contained kernel functions and not be directly exposed to modules. As a first step, move __flush_tlb() out of line and hide the native function. The latter can be static when CONFIG_PARAVIRT is disabled. Consolidate the namespace while at it and remove the pointless extra wrapper in the paravirt code. No functional change. Signed-off-by: Thomas Gleixner <[email protected]> Signed-off-by: Borislav Petkov <[email protected]> Reviewed-by: Alexandre Chartre <[email protected]> Acked-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
1 parent 9020d39 commit 2faf153

File tree

7 files changed

+45
-36
lines changed

7 files changed

+45
-36
lines changed

arch/x86/include/asm/paravirt.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,9 @@ static inline void slow_down_io(void)
4747
#endif
4848
}
4949

50-
static inline void __flush_tlb(void)
50+
void native_flush_tlb_local(void);
51+
52+
static inline void __flush_tlb_local(void)
5153
{
5254
PVOP_VCALL0(mmu.flush_tlb_user);
5355
}

arch/x86/include/asm/tlbflush.h

Lines changed: 5 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -140,12 +140,13 @@ static inline unsigned long build_cr3_noflush(pgd_t *pgd, u16 asid)
140140
return __sme_pa(pgd) | kern_pcid(asid) | CR3_NOFLUSH;
141141
}
142142

143+
void flush_tlb_local(void);
144+
143145
#ifdef CONFIG_PARAVIRT
144146
#include <asm/paravirt.h>
145147
#else
146-
#define __flush_tlb() __native_flush_tlb()
147-
#define __flush_tlb_global() __native_flush_tlb_global()
148-
#define __flush_tlb_one_user(addr) __native_flush_tlb_one_user(addr)
148+
#define __flush_tlb_global() __native_flush_tlb_global()
149+
#define __flush_tlb_one_user(addr) __native_flush_tlb_one_user(addr)
149150
#endif
150151

151152
struct tlb_context {
@@ -370,24 +371,6 @@ static inline void invalidate_user_asid(u16 asid)
370371
(unsigned long *)this_cpu_ptr(&cpu_tlbstate.user_pcid_flush_mask));
371372
}
372373

373-
/*
374-
* flush the entire current user mapping
375-
*/
376-
static inline void __native_flush_tlb(void)
377-
{
378-
/*
379-
* Preemption or interrupts must be disabled to protect the access
380-
* to the per CPU variable and to prevent being preempted between
381-
* read_cr3() and write_cr3().
382-
*/
383-
WARN_ON_ONCE(preemptible());
384-
385-
invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
386-
387-
/* If current->mm == NULL then the read_cr3() "borrows" an mm */
388-
native_write_cr3(__native_read_cr3());
389-
}
390-
391374
/*
392375
* flush everything
393376
*/
@@ -461,7 +444,7 @@ static inline void __flush_tlb_all(void)
461444
/*
462445
* !PGE -> !PCID (setup_pcid()), thus every flush is total.
463446
*/
464-
__flush_tlb();
447+
flush_tlb_local();
465448
}
466449
}
467450

@@ -537,8 +520,6 @@ struct flush_tlb_info {
537520
bool freed_tables;
538521
};
539522

540-
#define local_flush_tlb() __flush_tlb()
541-
542523
#define flush_tlb_mm(mm) \
543524
flush_tlb_mm_range(mm, 0UL, TLB_FLUSH_ALL, 0UL, true)
544525

arch/x86/kernel/cpu/mtrr/generic.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -761,7 +761,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
761761

762762
/* Flush all TLBs via a mov %cr3, %reg; mov %reg, %cr3 */
763763
count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
764-
__flush_tlb();
764+
flush_tlb_local();
765765

766766
/* Save MTRR state */
767767
rdmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);
@@ -778,7 +778,7 @@ static void post_set(void) __releases(set_atomicity_lock)
778778
{
779779
/* Flush TLBs (no need to flush caches - they are disabled) */
780780
count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
781-
__flush_tlb();
781+
flush_tlb_local();
782782

783783
/* Intel (P6) standard MTRRs */
784784
mtrr_wrmsr(MSR_MTRRdefType, deftype_lo, deftype_hi);

arch/x86/kernel/paravirt.c

Lines changed: 1 addition & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -160,11 +160,6 @@ unsigned paravirt_patch_insns(void *insn_buff, unsigned len,
160160
return insn_len;
161161
}
162162

163-
static void native_flush_tlb(void)
164-
{
165-
__native_flush_tlb();
166-
}
167-
168163
/*
169164
* Global pages have to be flushed a bit differently. Not a real
170165
* performance problem because this does not happen often.
@@ -359,7 +354,7 @@ struct paravirt_patch_template pv_ops = {
359354
#endif /* CONFIG_PARAVIRT_XXL */
360355

361356
/* Mmu ops. */
362-
.mmu.flush_tlb_user = native_flush_tlb,
357+
.mmu.flush_tlb_user = native_flush_tlb_local,
363358
.mmu.flush_tlb_kernel = native_flush_tlb_global,
364359
.mmu.flush_tlb_one_user = native_flush_tlb_one_user,
365360
.mmu.flush_tlb_others = native_flush_tlb_others,

arch/x86/mm/mem_encrypt.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -134,7 +134,7 @@ static void __init __sme_early_map_unmap_mem(void *vaddr, unsigned long size,
134134
size = (size <= PMD_SIZE) ? 0 : size - PMD_SIZE;
135135
} while (size);
136136

137-
__native_flush_tlb();
137+
flush_tlb_local();
138138
}
139139

140140
void __init sme_unmap_bootdata(char *real_mode_data)

arch/x86/mm/tlb.c

Lines changed: 32 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,13 @@
1818

1919
#include "mm_internal.h"
2020

21+
#ifdef CONFIG_PARAVIRT
22+
# define STATIC_NOPV
23+
#else
24+
# define STATIC_NOPV static
25+
# define __flush_tlb_local native_flush_tlb_local
26+
#endif
27+
2128
/*
2229
* TLB flushing, formerly SMP-only
2330
* c/o Linus Torvalds.
@@ -645,7 +652,7 @@ static void flush_tlb_func_common(const struct flush_tlb_info *f,
645652
trace_tlb_flush(reason, nr_invalidate);
646653
} else {
647654
/* Full flush. */
648-
local_flush_tlb();
655+
flush_tlb_local();
649656
if (local)
650657
count_vm_tlb_event(NR_TLB_LOCAL_FLUSH_ALL);
651658
trace_tlb_flush(reason, TLB_FLUSH_ALL);
@@ -883,6 +890,30 @@ unsigned long __get_current_cr3_fast(void)
883890
}
884891
EXPORT_SYMBOL_GPL(__get_current_cr3_fast);
885892

893+
/*
894+
* Flush the entire current user mapping
895+
*/
896+
STATIC_NOPV void native_flush_tlb_local(void)
897+
{
898+
/*
899+
* Preemption or interrupts must be disabled to protect the access
900+
* to the per CPU variable and to prevent being preempted between
901+
* read_cr3() and write_cr3().
902+
*/
903+
WARN_ON_ONCE(preemptible());
904+
905+
invalidate_user_asid(this_cpu_read(cpu_tlbstate.loaded_mm_asid));
906+
907+
/* If current->mm == NULL then the read_cr3() "borrows" an mm */
908+
native_write_cr3(__native_read_cr3());
909+
}
910+
911+
void flush_tlb_local(void)
912+
{
913+
__flush_tlb_local();
914+
}
915+
EXPORT_SYMBOL_GPL(flush_tlb_local);
916+
886917
/*
887918
* arch_tlbbatch_flush() performs a full TLB flush regardless of the active mm.
888919
* This means that the 'struct flush_tlb_info' that describes which mappings to

arch/x86/platform/uv/tlb_uv.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -293,7 +293,7 @@ static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
293293
* This must be a normal message, or retry of a normal message
294294
*/
295295
if (msg->address == TLB_FLUSH_ALL) {
296-
local_flush_tlb();
296+
flush_tlb_local();
297297
stat->d_alltlb++;
298298
} else {
299299
__flush_tlb_one_user(msg->address);

0 commit comments

Comments
 (0)