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Merge tag 'media/v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media
Pull media updates from Mauro Carvalho Chehab: - new i2c drivers: ds90ub913, ds90ub953, ds90ub960, dw9719, ds90ub913 - new Intel IVSC MEI drivers - some Mediatek platform drivers were moved to a common location - Intel atomisp2 driver is now working with the main ov2680 driver. Due to that, the atomisp2 ov2680 staging one was removed - the bttv driver was finally converted to videobuf2 framework. This was the last one upstream using videobuf version 1 core. We'll likely remove the old videobuf framework on 6.7 - lots of improvements at atomisp driver: it now works with normal I2C sensors. Several compile-mode dependecies to select between ISP2400 and ISP2401 are now solved in runtime - a new ipu-bridge logic was added to work with IVSC MEI drivers - venus driver gained better support for new VPU versions - the v4l core async framework has gained lots of improvements and cleanups - lots of other cleanups, improvements and driver fixes * tag 'media/v6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media: (358 commits) media: ivsc: Add ACPI dependency media: bttv: convert to vb2 media: bttv: use audio defaults for winfast2000 media: bttv: refactor bttv_set_dma() media: bttv: move vbi_skip/vbi_count out of buffer media: bttv: remove crop info from bttv_buffer media: bttv: remove tvnorm field from bttv_buffer media: bttv: remove format field from bttv_buffer media: bttv: move do_crop flag out of bttv_fh media: bttv: copy vbi_fmt from bttv_fh media: bttv: copy vid fmt/width/height from fh media: bttv: radio use v4l2_fh instead of bttv_fh media: bttv: replace BUG with WARN_ON media: bttv: use video_drvdata to get bttv media: i2c: rdacm21: Fix uninitialized value media: coda: Remove duplicated include media: vivid: fix the racy dev->radio_tx_rds_owner media: i2c: ccs: Check rules is non-NULL media: i2c: ds90ub960: Fix PLL config for 1200 MHz CSI rate media: i2c: ds90ub953: Fix use of uninitialized variables ...
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Documentation/admin-guide/media/qcom_camss.rst

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@@ -18,7 +18,7 @@ The driver implements V4L2, Media controller and V4L2 subdev interfaces.
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Camera sensor using V4L2 subdev interface in the kernel is supported.
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The driver is implemented using as a reference the Qualcomm Camera Subsystem
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driver for Android as found in Code Aurora [#f1]_ [#f2]_.
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driver for Android as found in Code Linaro [#f1]_ [#f2]_.
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Qualcomm Camera Subsystem hardware
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References
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----------
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.. [#f1] https://source.codeaurora.org/quic/la/kernel/msm-3.10/
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.. [#f2] https://source.codeaurora.org/quic/la/kernel/msm-3.18/
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.. [#f1] https://git.codelinaro.org/clo/la/kernel/msm-3.10/
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.. [#f2] https://git.codelinaro.org/clo/la/kernel/msm-3.18/
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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/i2c-atr.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Common i2c address translator properties
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maintainers:
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- Tomi Valkeinen <[email protected]>
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description:
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An I2C Address Translator (ATR) is a device with an I2C slave parent
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("upstream") port and N I2C master child ("downstream") ports, and
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forwards transactions from upstream to the appropriate downstream port
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with a modified slave address. The address used on the parent bus is
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called the "alias" and is (potentially) different from the physical
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slave address of the child bus. Address translation is done by the
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hardware.
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properties:
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i2c-alias-pool:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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description:
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I2C alias pool is a pool of I2C addresses on the main I2C bus that can be
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used to access the remote peripherals on the serializer's I2C bus. The
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addresses must be available, not used by any other peripheral. Each
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remote peripheral is assigned an alias from the pool, and transactions to
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that address will be forwarded to the remote peripheral, with the address
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translated to the remote peripheral's real address. This property is not
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needed if there are no I2C addressable remote peripherals.
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additionalProperties: true
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...

Documentation/devicetree/bindings/media/amphion,vpu.yaml

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@@ -47,7 +47,7 @@ patternProperties:
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$ref: ../mailbox/fsl,mu.yaml#
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"^vpu_core@[0-9a-f]+$":
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"^vpu-core@[0-9a-f]+$":
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description:
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Each core correspond a decoder or encoder, need to configure them
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separately. NXP i.MX8QM SoC has one decoder and two encoder, i.MX8QXP SoC
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power-domains = <&pd IMX_SC_R_VPU_MU_2>;
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};
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vpu_core0: vpu_core@2d080000 {
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vpu_core0: vpu-core@2d080000 {
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compatible = "nxp,imx8q-vpu-decoder";
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reg = <0x2d080000 0x10000>;
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power-domains = <&pd IMX_SC_R_VPU_DEC_0>;
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memory-region = <&decoder_boot>, <&decoder_rpc>;
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};
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vpu_core1: vpu_core@2d090000 {
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vpu_core1: vpu-core@2d090000 {
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compatible = "nxp,imx8q-vpu-encoder";
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reg = <0x2d090000 0x10000>;
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power-domains = <&pd IMX_SC_R_VPU_ENC_0>;
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memory-region = <&encoder1_boot>, <&encoder1_rpc>;
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};
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vpu_core2: vpu_core@2d0a0000 {
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vpu_core2: vpu-core@2d0a0000 {
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reg = <0x2d0a0000 0x10000>;
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compatible = "nxp,imx8q-vpu-encoder";
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power-domains = <&pd IMX_SC_R_VPU_ENC_1>;

Documentation/devicetree/bindings/media/cdns,csi2rx.txt

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/cdns,csi2rx.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Cadence MIPI-CSI2 RX controller
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maintainers:
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- Maxime Ripard <[email protected]>
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description:
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The Cadence MIPI-CSI2 RX controller is a CSI-2 bridge supporting up to 4 CSI
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lanes in input, and 4 different pixel streams in output.
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properties:
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compatible:
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items:
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- enum:
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- starfive,jh7110-csi2rx
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- const: cdns,csi2rx
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reg:
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maxItems: 1
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clocks:
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items:
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- description: CSI2Rx system clock
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- description: Gated Register bank clock for APB interface
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- description: pixel Clock for Stream interface 0
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- description: pixel Clock for Stream interface 1
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- description: pixel Clock for Stream interface 2
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- description: pixel Clock for Stream interface 3
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clock-names:
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items:
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- const: sys_clk
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- const: p_clk
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- const: pixel_if0_clk
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- const: pixel_if1_clk
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- const: pixel_if2_clk
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- const: pixel_if3_clk
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resets:
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items:
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- description: CSI2Rx system reset
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- description: Gated Register bank reset for APB interface
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- description: pixel reset for Stream interface 0
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- description: pixel reset for Stream interface 1
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- description: pixel reset for Stream interface 2
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- description: pixel reset for Stream interface 3
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reset-names:
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items:
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- const: sys
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- const: reg_bank
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- const: pixel_if0
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- const: pixel_if1
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- const: pixel_if2
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- const: pixel_if3
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phys:
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maxItems: 1
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description: MIPI D-PHY
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phy-names:
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items:
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- const: dphy
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/$defs/port-base
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unevaluatedProperties: false
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description:
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Input port node, single endpoint describing the CSI-2 transmitter.
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properties:
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endpoint:
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$ref: video-interfaces.yaml#
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unevaluatedProperties: false
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properties:
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bus-type:
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const: 4
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clock-lanes:
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const: 0
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data-lanes:
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minItems: 1
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maxItems: 4
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items:
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maximum: 4
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required:
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- data-lanes
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Stream 0 Output port node
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Stream 1 Output port node
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port@3:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Stream 2 Output port node
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port@4:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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Stream 3 Output port node
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required:
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- port@0
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- ports
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additionalProperties: false
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examples:
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- |
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csi@d060000 {
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compatible = "starfive,jh7110-csi2rx", "cdns,csi2rx";
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reg = <0x0d060000 0x1000>;
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clocks = <&byteclock 7>, <&byteclock 6>,
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<&coreclock 8>, <&coreclock 9>,
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<&coreclock 10>, <&coreclock 11>;
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clock-names = "sys_clk", "p_clk",
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"pixel_if0_clk", "pixel_if1_clk",
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"pixel_if2_clk", "pixel_if3_clk";
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resets = <&bytereset 9>, <&bytereset 4>,
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<&corereset 5>, <&corereset 6>,
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<&corereset 7>, <&corereset 8>;
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reset-names = "sys", "reg_bank",
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"pixel_if0", "pixel_if1",
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"pixel_if2", "pixel_if3";
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phys = <&csi_phy>;
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phy-names = "dphy";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csi2rx_in_sensor: endpoint {
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remote-endpoint = <&sensor_out_csi2rx>;
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clock-lanes = <0>;
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data-lanes = <1 2>;
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};
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};
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port@1 {
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reg = <1>;
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csi2rx_out_grabber0: endpoint {
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remote-endpoint = <&grabber0_in_csi2rx>;
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};
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};
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port@2 {
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reg = <2>;
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csi2rx_out_grabber1: endpoint {
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remote-endpoint = <&grabber1_in_csi2rx>;
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};
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};
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port@3 {
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reg = <3>;
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csi2rx_out_grabber2: endpoint {
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remote-endpoint = <&grabber2_in_csi2rx>;
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};
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};
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port@4 {
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reg = <4>;
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csi2rx_out_grabber3: endpoint {
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remote-endpoint = <&grabber3_in_csi2rx>;
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};
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};
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};
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};
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...

Documentation/devicetree/bindings/media/cec/nvidia,tegra114-cec.yaml

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interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_CEC>;
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clock-names = "cec";
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status = "disabled";
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hdmi-phandle = <&hdmi>;
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};

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