@@ -102,13 +102,13 @@ static int jpeg_v2_5_sw_init(void *handle)
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/* JPEG DJPEG POISON EVENT */
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r = amdgpu_irq_add_id (adev , amdgpu_ih_clientid_jpeg [i ],
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- VCN_2_6__SRCID_DJPEG0_POISON , & adev -> jpeg .inst [i ].irq );
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+ VCN_2_6__SRCID_DJPEG0_POISON , & adev -> jpeg .inst [i ].ras_poison_irq );
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if (r )
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return r ;
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/* JPEG EJPEG POISON EVENT */
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r = amdgpu_irq_add_id (adev , amdgpu_ih_clientid_jpeg [i ],
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- VCN_2_6__SRCID_EJPEG0_POISON , & adev -> jpeg .inst [i ].irq );
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+ VCN_2_6__SRCID_EJPEG0_POISON , & adev -> jpeg .inst [i ].ras_poison_irq );
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if (r )
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return r ;
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}
@@ -221,6 +221,9 @@ static int jpeg_v2_5_hw_fini(void *handle)
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if (adev -> jpeg .cur_state != AMD_PG_STATE_GATE &&
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RREG32_SOC15 (JPEG , i , mmUVD_JRBC_STATUS ))
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jpeg_v2_5_set_powergating_state (adev , AMD_PG_STATE_GATE );
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+
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+ if (amdgpu_ras_is_supported (adev , AMDGPU_RAS_BLOCK__JPEG ))
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+ amdgpu_irq_put (adev , & adev -> jpeg .inst [i ].ras_poison_irq , 0 );
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}
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return 0 ;
@@ -569,6 +572,14 @@ static int jpeg_v2_5_set_interrupt_state(struct amdgpu_device *adev,
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return 0 ;
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}
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+ static int jpeg_v2_6_set_ras_interrupt_state (struct amdgpu_device * adev ,
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+ struct amdgpu_irq_src * source ,
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+ unsigned int type ,
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+ enum amdgpu_interrupt_state state )
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+ {
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+ return 0 ;
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+ }
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+
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static int jpeg_v2_5_process_interrupt (struct amdgpu_device * adev ,
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struct amdgpu_irq_src * source ,
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struct amdgpu_iv_entry * entry )
@@ -593,10 +604,6 @@ static int jpeg_v2_5_process_interrupt(struct amdgpu_device *adev,
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case VCN_2_0__SRCID__JPEG_DECODE :
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amdgpu_fence_process (& adev -> jpeg .inst [ip_instance ].ring_dec );
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break ;
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- case VCN_2_6__SRCID_DJPEG0_POISON :
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- case VCN_2_6__SRCID_EJPEG0_POISON :
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- amdgpu_jpeg_process_poison_irq (adev , source , entry );
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- break ;
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default :
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DRM_ERROR ("Unhandled interrupt: %d %d\n" ,
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entry -> src_id , entry -> src_data [0 ]);
@@ -725,6 +732,11 @@ static const struct amdgpu_irq_src_funcs jpeg_v2_5_irq_funcs = {
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.process = jpeg_v2_5_process_interrupt ,
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};
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+ static const struct amdgpu_irq_src_funcs jpeg_v2_6_ras_irq_funcs = {
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+ .set = jpeg_v2_6_set_ras_interrupt_state ,
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+ .process = amdgpu_jpeg_process_poison_irq ,
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+ };
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+
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static void jpeg_v2_5_set_irq_funcs (struct amdgpu_device * adev )
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{
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int i ;
@@ -735,6 +747,9 @@ static void jpeg_v2_5_set_irq_funcs(struct amdgpu_device *adev)
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adev -> jpeg .inst [i ].irq .num_types = 1 ;
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adev -> jpeg .inst [i ].irq .funcs = & jpeg_v2_5_irq_funcs ;
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+
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+ adev -> jpeg .inst [i ].ras_poison_irq .num_types = 1 ;
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+ adev -> jpeg .inst [i ].ras_poison_irq .funcs = & jpeg_v2_6_ras_irq_funcs ;
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}
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}
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@@ -800,6 +815,7 @@ const struct amdgpu_ras_block_hw_ops jpeg_v2_6_ras_hw_ops = {
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static struct amdgpu_jpeg_ras jpeg_v2_6_ras = {
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.ras_block = {
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.hw_ops = & jpeg_v2_6_ras_hw_ops ,
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+ .ras_late_init = amdgpu_jpeg_ras_late_init ,
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},
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};
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