@@ -797,13 +797,22 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
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uint32_t max_linewidth ;
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unsigned int rotation ;
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uint32_t supported_rotations ;
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- const struct dpu_sspp_cfg * pipe_hw_caps = pstate -> pipe . sspp -> cap ;
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- const struct dpu_sspp_sub_blks * sblk = pstate -> pipe . sspp -> cap -> sblk ;
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+ const struct dpu_sspp_cfg * pipe_hw_caps ;
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+ const struct dpu_sspp_sub_blks * sblk ;
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if (new_plane_state -> crtc )
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crtc_state = drm_atomic_get_new_crtc_state (state ,
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new_plane_state -> crtc );
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+ pipe -> sspp = dpu_rm_get_sspp (& kms -> rm , pdpu -> pipe );
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+ r_pipe -> sspp = NULL ;
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+
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+ if (!pipe -> sspp )
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+ return - EINVAL ;
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+
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+ pipe_hw_caps = pipe -> sspp -> cap ;
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+ sblk = pipe -> sspp -> cap -> sblk ;
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+
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min_scale = FRAC_16_16 (1 , sblk -> maxupscale );
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ret = drm_atomic_helper_check_plane_state (new_plane_state , crtc_state ,
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min_scale ,
@@ -820,7 +829,6 @@ static int dpu_plane_atomic_check(struct drm_plane *plane,
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pipe -> multirect_mode = DPU_SSPP_MULTIRECT_NONE ;
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r_pipe -> multirect_index = DPU_SSPP_RECT_SOLO ;
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r_pipe -> multirect_mode = DPU_SSPP_MULTIRECT_NONE ;
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- r_pipe -> sspp = NULL ;
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pstate -> stage = DPU_STAGE_0 + pstate -> base .normalized_zpos ;
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if (pstate -> stage >= pdpu -> catalog -> caps -> max_mixer_blendstages ) {
@@ -1286,7 +1294,6 @@ static void dpu_plane_reset(struct drm_plane *plane)
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{
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struct dpu_plane * pdpu ;
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struct dpu_plane_state * pstate ;
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- struct dpu_kms * dpu_kms = _dpu_plane_get_kms (plane );
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if (!plane ) {
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DPU_ERROR ("invalid plane\n" );
@@ -1308,16 +1315,6 @@ static void dpu_plane_reset(struct drm_plane *plane)
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return ;
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}
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- /*
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- * Set the SSPP here until we have proper virtualized DPU planes.
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- * This is the place where the state is allocated, so fill it fully.
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- */
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- pstate -> pipe .sspp = dpu_rm_get_sspp (& dpu_kms -> rm , pdpu -> pipe );
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- pstate -> pipe .multirect_index = DPU_SSPP_RECT_SOLO ;
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- pstate -> pipe .multirect_mode = DPU_SSPP_MULTIRECT_NONE ;
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-
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- pstate -> r_pipe .sspp = NULL ;
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-
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__drm_atomic_helper_plane_reset (plane , & pstate -> base );
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}
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