@@ -463,6 +463,26 @@ static void dm_pflip_high_irq(void *interrupt_params)
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vrr_active , (int ) !e );
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}
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+ static void dm_crtc_handle_vblank (struct amdgpu_crtc * acrtc )
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+ {
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+ struct drm_crtc * crtc = & acrtc -> base ;
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+ struct drm_device * dev = crtc -> dev ;
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+ unsigned long flags ;
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+
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+ drm_crtc_handle_vblank (crtc );
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+
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+ spin_lock_irqsave (& dev -> event_lock , flags );
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+
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+ /* Send completion event for cursor-only commits */
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+ if (acrtc -> event && acrtc -> pflip_status != AMDGPU_FLIP_SUBMITTED ) {
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+ drm_crtc_send_vblank_event (crtc , acrtc -> event );
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+ drm_crtc_vblank_put (crtc );
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+ acrtc -> event = NULL ;
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+ }
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+
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+ spin_unlock_irqrestore (& dev -> event_lock , flags );
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+ }
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+
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static void dm_vupdate_high_irq (void * interrupt_params )
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{
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struct common_irq_params * irq_params = interrupt_params ;
@@ -501,7 +521,7 @@ static void dm_vupdate_high_irq(void *interrupt_params)
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* if a pageflip happened inside front-porch.
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*/
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if (vrr_active ) {
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- drm_crtc_handle_vblank ( & acrtc -> base );
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+ dm_crtc_handle_vblank ( acrtc );
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/* BTR processing for pre-DCE12 ASICs */
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if (acrtc -> dm_irq_params .stream &&
@@ -553,7 +573,7 @@ static void dm_crtc_high_irq(void *interrupt_params)
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* to dm_vupdate_high_irq after end of front-porch.
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*/
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if (!vrr_active )
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- drm_crtc_handle_vblank ( & acrtc -> base );
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+ dm_crtc_handle_vblank ( acrtc );
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/**
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* Following stuff must happen at start of vblank, for crc
@@ -9174,6 +9194,7 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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struct amdgpu_bo * abo ;
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uint32_t target_vblank , last_flip_vblank ;
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bool vrr_active = amdgpu_dm_vrr_active (acrtc_state );
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+ bool cursor_update = false;
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bool pflip_present = false;
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struct {
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struct dc_surface_update surface_updates [MAX_SURFACES ];
@@ -9209,8 +9230,13 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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struct dm_plane_state * dm_new_plane_state = to_dm_plane_state (new_plane_state );
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/* Cursor plane is handled after stream updates */
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- if (plane -> type == DRM_PLANE_TYPE_CURSOR )
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+ if (plane -> type == DRM_PLANE_TYPE_CURSOR ) {
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+ if ((fb && crtc == pcrtc ) ||
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+ (old_plane_state -> fb && old_plane_state -> crtc == pcrtc ))
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+ cursor_update = true;
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+
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continue ;
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+ }
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if (!fb || !crtc || pcrtc != crtc )
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continue ;
@@ -9373,6 +9399,17 @@ static void amdgpu_dm_commit_planes(struct drm_atomic_state *state,
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bundle -> stream_update .vrr_infopacket =
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& acrtc_state -> stream -> vrr_infopacket ;
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}
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+ } else if (cursor_update && acrtc_state -> active_planes > 0 &&
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+ !acrtc_state -> force_dpms_off &&
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+ acrtc_attach -> base .state -> event ) {
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+ drm_crtc_vblank_get (pcrtc );
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+
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+ spin_lock_irqsave (& pcrtc -> dev -> event_lock , flags );
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+
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+ acrtc_attach -> event = acrtc_attach -> base .state -> event ;
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+ acrtc_attach -> base .state -> event = NULL ;
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+
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+ spin_unlock_irqrestore (& pcrtc -> dev -> event_lock , flags );
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}
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/* Update the planes if changed or disable if we don't have any. */
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