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Merge tag 'acpi-5.9-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more ACPI updates from Rafael Wysocki: "Add new hardware support to the ACPI driver for AMD SoCs, the x86 clk driver and the Designware i2c driver (changes from Akshu Agrawal and Pu Wen)" * tag 'acpi-5.9-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: clk: x86: Support RV architecture ACPI: APD: Add a fmw property is_raven clk: x86: Change name from ST to FCH ACPI: APD: Change name from ST to FCH i2c: designware: Add device HID for Hygon I2C controller
2 parents 1a5d9db + 19fe87f commit 341323f

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6 files changed

+121
-91
lines changed

6 files changed

+121
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lines changed

drivers/acpi/acpi_apd.c

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -8,7 +8,7 @@
88
*/
99

1010
#include <linux/clk-provider.h>
11-
#include <linux/platform_data/clk-st.h>
11+
#include <linux/platform_data/clk-fch.h>
1212
#include <linux/platform_device.h>
1313
#include <linux/pm_domain.h>
1414
#include <linux/clkdev.h>
@@ -79,11 +79,12 @@ static int misc_check_res(struct acpi_resource *ares, void *data)
7979
return !acpi_dev_resource_memory(ares, &res);
8080
}
8181

82-
static int st_misc_setup(struct apd_private_data *pdata)
82+
static int fch_misc_setup(struct apd_private_data *pdata)
8383
{
8484
struct acpi_device *adev = pdata->adev;
85+
const union acpi_object *obj;
8586
struct platform_device *clkdev;
86-
struct st_clk_data *clk_data;
87+
struct fch_clk_data *clk_data;
8788
struct resource_entry *rentry;
8889
struct list_head resource_list;
8990
int ret;
@@ -98,6 +99,9 @@ static int st_misc_setup(struct apd_private_data *pdata)
9899
if (ret < 0)
99100
return -ENOENT;
100101

102+
acpi_dev_get_property(adev, "is-rv", ACPI_TYPE_INTEGER, &obj);
103+
clk_data->is_rv = obj->integer.value;
104+
101105
list_for_each_entry(rentry, &resource_list, node) {
102106
clk_data->base = devm_ioremap(&adev->dev, rentry->res->start,
103107
resource_size(rentry->res));
@@ -106,7 +110,7 @@ static int st_misc_setup(struct apd_private_data *pdata)
106110

107111
acpi_dev_free_resource_list(&resource_list);
108112

109-
clkdev = platform_device_register_data(&adev->dev, "clk-st",
113+
clkdev = platform_device_register_data(&adev->dev, "clk-fch",
110114
PLATFORM_DEVID_NONE, clk_data,
111115
sizeof(*clk_data));
112116
return PTR_ERR_OR_ZERO(clkdev);
@@ -135,8 +139,8 @@ static const struct apd_device_desc cz_uart_desc = {
135139
.properties = uart_properties,
136140
};
137141

138-
static const struct apd_device_desc st_misc_desc = {
139-
.setup = st_misc_setup,
142+
static const struct apd_device_desc fch_misc_desc = {
143+
.setup = fch_misc_setup,
140144
};
141145
#endif
142146

@@ -239,7 +243,8 @@ static const struct acpi_device_id acpi_apd_device_ids[] = {
239243
{ "AMD0020", APD_ADDR(cz_uart_desc) },
240244
{ "AMDI0020", APD_ADDR(cz_uart_desc) },
241245
{ "AMD0030", },
242-
{ "AMD0040", APD_ADDR(st_misc_desc)},
246+
{ "AMD0040", APD_ADDR(fch_misc_desc)},
247+
{ "HYGO0010", APD_ADDR(wt_i2c_desc) },
243248
#endif
244249
#ifdef CONFIG_ARM64
245250
{ "APMC0D0F", APD_ADDR(xgene_i2c_desc) },

drivers/clk/x86/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
# SPDX-License-Identifier: GPL-2.0-only
22
obj-$(CONFIG_PMC_ATOM) += clk-pmc-atom.o
3-
obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-st.o
3+
obj-$(CONFIG_X86_AMD_PLATFORM_DEVICE) += clk-fch.o
44
clk-x86-lpss-objs := clk-lpt.o
55
obj-$(CONFIG_X86_INTEL_LPSS) += clk-x86-lpss.o
66
obj-$(CONFIG_CLK_LGM_CGU) += clk-cgu.o clk-cgu-pll.o clk-lgm.o

drivers/clk/x86/clk-fch.c

Lines changed: 101 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,101 @@
1+
// SPDX-License-Identifier: MIT
2+
/*
3+
* clock framework for AMD Stoney based clocks
4+
*
5+
* Copyright 2018 Advanced Micro Devices, Inc.
6+
*/
7+
8+
#include <linux/clk.h>
9+
#include <linux/clkdev.h>
10+
#include <linux/clk-provider.h>
11+
#include <linux/platform_data/clk-fch.h>
12+
#include <linux/platform_device.h>
13+
14+
/* Clock Driving Strength 2 register */
15+
#define CLKDRVSTR2 0x28
16+
/* Clock Control 1 register */
17+
#define MISCCLKCNTL1 0x40
18+
/* Auxiliary clock1 enable bit */
19+
#define OSCCLKENB 2
20+
/* 25Mhz auxiliary output clock freq bit */
21+
#define OSCOUT1CLK25MHZ 16
22+
23+
#define ST_CLK_48M 0
24+
#define ST_CLK_25M 1
25+
#define ST_CLK_MUX 2
26+
#define ST_CLK_GATE 3
27+
#define ST_MAX_CLKS 4
28+
29+
#define RV_CLK_48M 0
30+
#define RV_CLK_GATE 1
31+
#define RV_MAX_CLKS 2
32+
33+
static const char * const clk_oscout1_parents[] = { "clk48MHz", "clk25MHz" };
34+
static struct clk_hw *hws[ST_MAX_CLKS];
35+
36+
static int fch_clk_probe(struct platform_device *pdev)
37+
{
38+
struct fch_clk_data *fch_data;
39+
40+
fch_data = dev_get_platdata(&pdev->dev);
41+
if (!fch_data || !fch_data->base)
42+
return -EINVAL;
43+
44+
if (!fch_data->is_rv) {
45+
hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz",
46+
NULL, 0, 48000000);
47+
hws[ST_CLK_25M] = clk_hw_register_fixed_rate(NULL, "clk25MHz",
48+
NULL, 0, 25000000);
49+
50+
hws[ST_CLK_MUX] = clk_hw_register_mux(NULL, "oscout1_mux",
51+
clk_oscout1_parents, ARRAY_SIZE(clk_oscout1_parents),
52+
0, fch_data->base + CLKDRVSTR2, OSCOUT1CLK25MHZ, 3, 0,
53+
NULL);
54+
55+
clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk);
56+
57+
hws[ST_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1",
58+
"oscout1_mux", 0, fch_data->base + MISCCLKCNTL1,
59+
OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL);
60+
61+
devm_clk_hw_register_clkdev(&pdev->dev, hws[ST_CLK_GATE],
62+
"oscout1", NULL);
63+
} else {
64+
hws[RV_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz",
65+
NULL, 0, 48000000);
66+
67+
hws[RV_CLK_GATE] = clk_hw_register_gate(NULL, "oscout1",
68+
"clk48MHz", 0, fch_data->base + MISCCLKCNTL1,
69+
OSCCLKENB, CLK_GATE_SET_TO_DISABLE, NULL);
70+
71+
devm_clk_hw_register_clkdev(&pdev->dev, hws[RV_CLK_GATE],
72+
"oscout1", NULL);
73+
}
74+
75+
return 0;
76+
}
77+
78+
static int fch_clk_remove(struct platform_device *pdev)
79+
{
80+
int i, clks;
81+
struct fch_clk_data *fch_data;
82+
83+
fch_data = dev_get_platdata(&pdev->dev);
84+
85+
clks = fch_data->is_rv ? RV_MAX_CLKS : ST_MAX_CLKS;
86+
87+
for (i = 0; i < clks; i++)
88+
clk_hw_unregister(hws[i]);
89+
90+
return 0;
91+
}
92+
93+
static struct platform_driver fch_clk_driver = {
94+
.driver = {
95+
.name = "clk-fch",
96+
.suppress_bind_attrs = true,
97+
},
98+
.probe = fch_clk_probe,
99+
.remove = fch_clk_remove,
100+
};
101+
builtin_platform_driver(fch_clk_driver);

drivers/clk/x86/clk-st.c

Lines changed: 0 additions & 78 deletions
This file was deleted.

drivers/i2c/busses/i2c-designware-platdrv.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@ static const struct acpi_device_id dw_i2c_acpi_match[] = {
5555
{ "HISI02A1", 0 },
5656
{ "HISI02A2", 0 },
5757
{ "HISI02A3", 0 },
58+
{ "HYGO0010", ACCESS_INTR_MASK },
5859
{ }
5960
};
6061
MODULE_DEVICE_TABLE(acpi, dw_i2c_acpi_match);
Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,18 @@
11
/* SPDX-License-Identifier: MIT */
22
/*
3-
* clock framework for AMD Stoney based clock
3+
* clock framework for AMD misc clocks
44
*
55
* Copyright 2018 Advanced Micro Devices, Inc.
66
*/
77

8-
#ifndef __CLK_ST_H
9-
#define __CLK_ST_H
8+
#ifndef __CLK_FCH_H
9+
#define __CLK_FCH_H
1010

1111
#include <linux/compiler.h>
1212

13-
struct st_clk_data {
13+
struct fch_clk_data {
1414
void __iomem *base;
15+
u32 is_rv;
1516
};
1617

17-
#endif /* __CLK_ST_H */
18+
#endif /* __CLK_FCH_H */

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