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Commit 3442a9e

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Kan LiangPeter Zijlstra
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perf/x86/intel/uncore: Factor out __snr_uncore_mmio_init_box
The IMC uncore unit in Ice Lake server can only be accessed by MMIO, which is similar as Snow Ridge. Factor out __snr_uncore_mmio_init_box which can be shared with Ice Lake server in the following patch. No functional changes. Signed-off-by: Kan Liang <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Link: https://lkml.kernel.org/r/[email protected]
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arch/x86/events/intel/uncore_snbep.c

Lines changed: 9 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -4380,10 +4380,10 @@ static struct pci_dev *snr_uncore_get_mc_dev(int id)
43804380
return mc_dev;
43814381
}
43824382

4383-
static void snr_uncore_mmio_init_box(struct intel_uncore_box *box)
4383+
static void __snr_uncore_mmio_init_box(struct intel_uncore_box *box,
4384+
unsigned int box_ctl, int mem_offset)
43844385
{
43854386
struct pci_dev *pdev = snr_uncore_get_mc_dev(box->dieid);
4386-
unsigned int box_ctl = uncore_mmio_box_ctl(box);
43874387
resource_size_t addr;
43884388
u32 pci_dword;
43894389

@@ -4393,7 +4393,7 @@ static void snr_uncore_mmio_init_box(struct intel_uncore_box *box)
43934393
pci_read_config_dword(pdev, SNR_IMC_MMIO_BASE_OFFSET, &pci_dword);
43944394
addr = (pci_dword & SNR_IMC_MMIO_BASE_MASK) << 23;
43954395

4396-
pci_read_config_dword(pdev, SNR_IMC_MMIO_MEM0_OFFSET, &pci_dword);
4396+
pci_read_config_dword(pdev, mem_offset, &pci_dword);
43974397
addr |= (pci_dword & SNR_IMC_MMIO_MEM0_MASK) << 12;
43984398

43994399
addr += box_ctl;
@@ -4405,6 +4405,12 @@ static void snr_uncore_mmio_init_box(struct intel_uncore_box *box)
44054405
writel(IVBEP_PMON_BOX_CTL_INT, box->io_addr);
44064406
}
44074407

4408+
static void snr_uncore_mmio_init_box(struct intel_uncore_box *box)
4409+
{
4410+
__snr_uncore_mmio_init_box(box, uncore_mmio_box_ctl(box),
4411+
SNR_IMC_MMIO_MEM0_OFFSET);
4412+
}
4413+
44084414
static void snr_uncore_mmio_disable_box(struct intel_uncore_box *box)
44094415
{
44104416
u32 config;

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