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157 | 157 | * If any burst is in flight and DMA paused then this is the time to complete
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158 | 158 | * on-flight burst and update DMA status register.
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159 | 159 | */
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160 |
| -#define TEGRA_GPCDMA_BURST_COMPLETE_TIME 20 |
161 |
| -#define TEGRA_GPCDMA_BURST_COMPLETION_TIMEOUT 100 |
| 160 | +#define TEGRA_GPCDMA_BURST_COMPLETE_TIME 10 |
| 161 | +#define TEGRA_GPCDMA_BURST_COMPLETION_TIMEOUT 5000 /* 5 msec */ |
162 | 162 |
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163 | 163 | /* Channel base address offset from GPCDMA base address */
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164 | 164 | #define TEGRA_GPCDMA_CHANNEL_BASE_ADD_OFFSET 0x20000
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@@ -432,6 +432,17 @@ static int tegra_dma_device_resume(struct dma_chan *dc)
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432 | 432 | return 0;
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433 | 433 | }
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434 | 434 |
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| 435 | +static inline int tegra_dma_pause_noerr(struct tegra_dma_channel *tdc) |
| 436 | +{ |
| 437 | + /* Return 0 irrespective of PAUSE status. |
| 438 | + * This is useful to recover channels that can exit out of flush |
| 439 | + * state when the channel is disabled. |
| 440 | + */ |
| 441 | + |
| 442 | + tegra_dma_pause(tdc); |
| 443 | + return 0; |
| 444 | +} |
| 445 | + |
435 | 446 | static void tegra_dma_disable(struct tegra_dma_channel *tdc)
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436 | 447 | {
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437 | 448 | u32 csr, status;
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@@ -1292,13 +1303,24 @@ static const struct tegra_dma_chip_data tegra194_dma_chip_data = {
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1292 | 1303 | .terminate = tegra_dma_pause,
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1293 | 1304 | };
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1294 | 1305 |
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| 1306 | +static const struct tegra_dma_chip_data tegra234_dma_chip_data = { |
| 1307 | + .nr_channels = 31, |
| 1308 | + .channel_reg_size = SZ_64K, |
| 1309 | + .max_dma_count = SZ_1G, |
| 1310 | + .hw_support_pause = true, |
| 1311 | + .terminate = tegra_dma_pause_noerr, |
| 1312 | +}; |
| 1313 | + |
1295 | 1314 | static const struct of_device_id tegra_dma_of_match[] = {
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1296 | 1315 | {
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1297 | 1316 | .compatible = "nvidia,tegra186-gpcdma",
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1298 | 1317 | .data = &tegra186_dma_chip_data,
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1299 | 1318 | }, {
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1300 | 1319 | .compatible = "nvidia,tegra194-gpcdma",
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1301 | 1320 | .data = &tegra194_dma_chip_data,
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| 1321 | + }, { |
| 1322 | + .compatible = "nvidia,tegra234-gpcdma", |
| 1323 | + .data = &tegra234_dma_chip_data, |
1302 | 1324 | }, {
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1303 | 1325 | },
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1304 | 1326 | };
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