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Merge tag 'drm/tegra/for-5.9-rc1' of ssh://git.freedesktop.org/git/tegra/linux into drm-next
drm/tegra: Changes for v5.9-rc1 This set of patches contains a few preparatory patches to enable video capture support from external camera modules. This is a dependency for the V4L2 driver patches that will likely be merged in v5.9 or v5.10. On top of that there are a couple of fixes across the board as well as some improvements. From a feature point of view this also adds support for horizontal reflection and 180° rotation of planes. Signed-off-by: Dave Airlie <[email protected]> From: Thierry Reding <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 41206a0 + 4fba6d2 commit 395be0f

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14 files changed

+111
-43
lines changed

14 files changed

+111
-43
lines changed

drivers/gpu/drm/tegra/dc.c

Lines changed: 38 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -368,6 +368,12 @@ static void tegra_dc_setup_window(struct tegra_plane *plane,
368368
h_size = window->src.w * bpp;
369369
v_size = window->src.h;
370370

371+
if (window->reflect_x)
372+
h_offset += (window->src.w - 1) * bpp;
373+
374+
if (window->reflect_y)
375+
v_offset += window->src.h - 1;
376+
371377
value = V_PRESCALED_SIZE(v_size) | H_PRESCALED_SIZE(h_size);
372378
tegra_plane_writel(plane, value, DC_WIN_PRESCALED_SIZE);
373379

@@ -404,9 +410,6 @@ static void tegra_dc_setup_window(struct tegra_plane *plane,
404410
tegra_plane_writel(plane, window->stride[0], DC_WIN_LINE_STRIDE);
405411
}
406412

407-
if (window->bottom_up)
408-
v_offset += window->src.h - 1;
409-
410413
tegra_plane_writel(plane, h_offset, DC_WINBUF_ADDR_H_OFFSET);
411414
tegra_plane_writel(plane, v_offset, DC_WINBUF_ADDR_V_OFFSET);
412415

@@ -470,7 +473,10 @@ static void tegra_dc_setup_window(struct tegra_plane *plane,
470473
value |= COLOR_EXPAND;
471474
}
472475

473-
if (window->bottom_up)
476+
if (window->reflect_x)
477+
value |= H_DIRECTION;
478+
479+
if (window->reflect_y)
474480
value |= V_DIRECTION;
475481

476482
if (tegra_plane_use_horizontal_filtering(plane, window)) {
@@ -601,7 +607,10 @@ static int tegra_plane_atomic_check(struct drm_plane *plane,
601607
struct drm_plane_state *state)
602608
{
603609
struct tegra_plane_state *plane_state = to_tegra_plane_state(state);
604-
unsigned int rotation = DRM_MODE_ROTATE_0 | DRM_MODE_REFLECT_Y;
610+
unsigned int supported_rotation = DRM_MODE_ROTATE_0 |
611+
DRM_MODE_REFLECT_X |
612+
DRM_MODE_REFLECT_Y;
613+
unsigned int rotation = state->rotation;
605614
struct tegra_bo_tiling *tiling = &plane_state->tiling;
606615
struct tegra_plane *tegra = to_tegra_plane(plane);
607616
struct tegra_dc *dc = to_tegra_dc(state->crtc);
@@ -639,12 +648,26 @@ static int tegra_plane_atomic_check(struct drm_plane *plane,
639648
return -EINVAL;
640649
}
641650

642-
rotation = drm_rotation_simplify(state->rotation, rotation);
651+
/*
652+
* Older userspace used custom BO flag in order to specify the Y
653+
* reflection, while modern userspace uses the generic DRM rotation
654+
* property in order to achieve the same result. The legacy BO flag
655+
* duplicates the DRM rotation property when both are set.
656+
*/
657+
if (tegra_fb_is_bottom_up(state->fb))
658+
rotation |= DRM_MODE_REFLECT_Y;
659+
660+
rotation = drm_rotation_simplify(rotation, supported_rotation);
661+
662+
if (rotation & DRM_MODE_REFLECT_X)
663+
plane_state->reflect_x = true;
664+
else
665+
plane_state->reflect_x = false;
643666

644667
if (rotation & DRM_MODE_REFLECT_Y)
645-
plane_state->bottom_up = true;
668+
plane_state->reflect_y = true;
646669
else
647-
plane_state->bottom_up = false;
670+
plane_state->reflect_y = false;
648671

649672
/*
650673
* Tegra doesn't support different strides for U and V planes so we
@@ -706,7 +729,8 @@ static void tegra_plane_atomic_update(struct drm_plane *plane,
706729
window.dst.w = drm_rect_width(&plane->state->dst);
707730
window.dst.h = drm_rect_height(&plane->state->dst);
708731
window.bits_per_pixel = fb->format->cpp[0] * 8;
709-
window.bottom_up = tegra_fb_is_bottom_up(fb) || state->bottom_up;
732+
window.reflect_x = state->reflect_x;
733+
window.reflect_y = state->reflect_y;
710734

711735
/* copy from state */
712736
window.zpos = plane->state->normalized_zpos;
@@ -792,6 +816,8 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm,
792816
err = drm_plane_create_rotation_property(&plane->base,
793817
DRM_MODE_ROTATE_0,
794818
DRM_MODE_ROTATE_0 |
819+
DRM_MODE_ROTATE_180 |
820+
DRM_MODE_REFLECT_X |
795821
DRM_MODE_REFLECT_Y);
796822
if (err < 0)
797823
dev_err(dc->dev, "failed to create rotation property: %d\n",
@@ -1080,6 +1106,8 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm,
10801106
err = drm_plane_create_rotation_property(&plane->base,
10811107
DRM_MODE_ROTATE_0,
10821108
DRM_MODE_ROTATE_0 |
1109+
DRM_MODE_ROTATE_180 |
1110+
DRM_MODE_REFLECT_X |
10831111
DRM_MODE_REFLECT_Y);
10841112
if (err < 0)
10851113
dev_err(dc->dev, "failed to create rotation property: %d\n",
@@ -2555,10 +2583,8 @@ static int tegra_dc_probe(struct platform_device *pdev)
25552583
return PTR_ERR(dc->regs);
25562584

25572585
dc->irq = platform_get_irq(pdev, 0);
2558-
if (dc->irq < 0) {
2559-
dev_err(&pdev->dev, "failed to get IRQ\n");
2586+
if (dc->irq < 0)
25602587
return -ENXIO;
2561-
}
25622588

25632589
err = tegra_dc_rgb_probe(dc);
25642590
if (err < 0 && err != -ENODEV) {

drivers/gpu/drm/tegra/dc.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -136,7 +136,8 @@ struct tegra_dc_window {
136136
unsigned int stride[2];
137137
unsigned long base[3];
138138
unsigned int zpos;
139-
bool bottom_up;
139+
bool reflect_x;
140+
bool reflect_y;
140141

141142
struct tegra_bo_tiling tiling;
142143
u32 format;

drivers/gpu/drm/tegra/dsi.c

Lines changed: 7 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -670,6 +670,7 @@ static int tegra_dsi_pad_enable(struct tegra_dsi *dsi)
670670
static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)
671671
{
672672
u32 value;
673+
int err;
673674

674675
/*
675676
* XXX Is this still needed? The module reset is deasserted right
@@ -693,7 +694,11 @@ static int tegra_dsi_pad_calibrate(struct tegra_dsi *dsi)
693694
DSI_PAD_PREEMP_PD(0x03) | DSI_PAD_PREEMP_PU(0x3);
694695
tegra_dsi_writel(dsi, value, DSI_PAD_CONTROL_3);
695696

696-
return tegra_mipi_calibrate(dsi->mipi);
697+
err = tegra_mipi_calibrate(dsi->mipi);
698+
if (err < 0)
699+
return err;
700+
701+
return tegra_mipi_wait(dsi->mipi);
697702
}
698703

699704
static void tegra_dsi_set_timeout(struct tegra_dsi *dsi, unsigned long bclk,
@@ -1618,7 +1623,7 @@ static int tegra_dsi_probe(struct platform_device *pdev)
16181623
if (IS_ERR(dsi->regs))
16191624
return PTR_ERR(dsi->regs);
16201625

1621-
dsi->mipi = tegra_mipi_request(&pdev->dev);
1626+
dsi->mipi = tegra_mipi_request(&pdev->dev, pdev->dev.of_node);
16221627
if (IS_ERR(dsi->mipi))
16231628
return PTR_ERR(dsi->mipi);
16241629

drivers/gpu/drm/tegra/gr2d.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -177,6 +177,7 @@ static const u32 gr2d_addr_regs[] = {
177177
GR2D_DSTC_BASE_ADDR,
178178
GR2D_SRCA_BASE_ADDR,
179179
GR2D_SRCB_BASE_ADDR,
180+
GR2D_PATBASE_ADDR,
180181
GR2D_SRC_BASE_ADDR_SB,
181182
GR2D_DSTA_BASE_ADDR_SB,
182183
GR2D_DSTB_BASE_ADDR_SB,

drivers/gpu/drm/tegra/gr2d.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#define GR2D_DSTC_BASE_ADDR 0x2d
1515
#define GR2D_SRCA_BASE_ADDR 0x31
1616
#define GR2D_SRCB_BASE_ADDR 0x32
17+
#define GR2D_PATBASE_ADDR 0x47
1718
#define GR2D_SRC_BASE_ADDR_SB 0x48
1819
#define GR2D_DSTA_BASE_ADDR_SB 0x49
1920
#define GR2D_DSTB_BASE_ADDR_SB 0x4a

drivers/gpu/drm/tegra/gr3d.c

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -381,10 +381,12 @@ static int gr3d_remove(struct platform_device *pdev)
381381
}
382382

383383
if (gr3d->clk_secondary) {
384+
reset_control_assert(gr3d->rst_secondary);
384385
tegra_powergate_power_off(TEGRA_POWERGATE_3D1);
385386
clk_disable_unprepare(gr3d->clk_secondary);
386387
}
387388

389+
reset_control_assert(gr3d->rst);
388390
tegra_powergate_power_off(TEGRA_POWERGATE_3D);
389391
clk_disable_unprepare(gr3d->clk);
390392

drivers/gpu/drm/tegra/plane.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -61,7 +61,8 @@ tegra_plane_atomic_duplicate_state(struct drm_plane *plane)
6161
copy->tiling = state->tiling;
6262
copy->format = state->format;
6363
copy->swap = state->swap;
64-
copy->bottom_up = state->bottom_up;
64+
copy->reflect_x = state->reflect_x;
65+
copy->reflect_y = state->reflect_y;
6566
copy->opaque = state->opaque;
6667

6768
for (i = 0; i < 2; i++)

drivers/gpu/drm/tegra/plane.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -46,7 +46,8 @@ struct tegra_plane_state {
4646
u32 format;
4747
u32 swap;
4848

49-
bool bottom_up;
49+
bool reflect_x;
50+
bool reflect_y;
5051

5152
/* used for legacy blending support only */
5253
struct tegra_plane_legacy_blending_state blending[2];

drivers/gpu/drm/tegra/sor.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2946,7 +2946,7 @@ static int tegra_sor_hdmi_probe(struct tegra_sor *sor)
29462946
{
29472947
int err;
29482948

2949-
sor->avdd_io_supply = devm_regulator_get(sor->dev, "avdd-io");
2949+
sor->avdd_io_supply = devm_regulator_get(sor->dev, "avdd-io-hdmi-dp");
29502950
if (IS_ERR(sor->avdd_io_supply)) {
29512951
dev_err(sor->dev, "cannot get AVDD I/O supply: %ld\n",
29522952
PTR_ERR(sor->avdd_io_supply));
@@ -2960,7 +2960,7 @@ static int tegra_sor_hdmi_probe(struct tegra_sor *sor)
29602960
return err;
29612961
}
29622962

2963-
sor->vdd_pll_supply = devm_regulator_get(sor->dev, "vdd-pll");
2963+
sor->vdd_pll_supply = devm_regulator_get(sor->dev, "vdd-hdmi-dp-pll");
29642964
if (IS_ERR(sor->vdd_pll_supply)) {
29652965
dev_err(sor->dev, "cannot get VDD PLL supply: %ld\n",
29662966
PTR_ERR(sor->vdd_pll_supply));

drivers/gpu/host1x/debug.c

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,8 @@
1616
#include "debug.h"
1717
#include "channel.h"
1818

19+
static DEFINE_MUTEX(debug_lock);
20+
1921
unsigned int host1x_debug_trace_cmdbuf;
2022

2123
static pid_t host1x_debug_force_timeout_pid;
@@ -52,12 +54,14 @@ static int show_channel(struct host1x_channel *ch, void *data, bool show_fifo)
5254
struct output *o = data;
5355

5456
mutex_lock(&ch->cdma.lock);
57+
mutex_lock(&debug_lock);
5558

5659
if (show_fifo)
5760
host1x_hw_show_channel_fifo(m, ch, o);
5861

5962
host1x_hw_show_channel_cdma(m, ch, o);
6063

64+
mutex_unlock(&debug_lock);
6165
mutex_unlock(&ch->cdma.lock);
6266

6367
return 0;

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