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454 | 454 | };
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455 | 455 |
|
456 | 456 | gpt1: timer@302d0000 {
|
457 |
| - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
| 457 | + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; |
458 | 458 | reg = <0x302d0000 0x10000>;
|
459 | 459 | interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
|
460 | 460 | clocks = <&clks IMX7D_GPT1_ROOT_CLK>,
|
|
463 | 463 | };
|
464 | 464 |
|
465 | 465 | gpt2: timer@302e0000 {
|
466 |
| - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
| 466 | + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; |
467 | 467 | reg = <0x302e0000 0x10000>;
|
468 | 468 | interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
|
469 | 469 | clocks = <&clks IMX7D_GPT2_ROOT_CLK>,
|
|
473 | 473 | };
|
474 | 474 |
|
475 | 475 | gpt3: timer@302f0000 {
|
476 |
| - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
| 476 | + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; |
477 | 477 | reg = <0x302f0000 0x10000>;
|
478 | 478 | interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
|
479 | 479 | clocks = <&clks IMX7D_GPT3_ROOT_CLK>,
|
|
483 | 483 | };
|
484 | 484 |
|
485 | 485 | gpt4: timer@30300000 {
|
486 |
| - compatible = "fsl,imx7d-gpt", "fsl,imx6sx-gpt"; |
| 486 | + compatible = "fsl,imx7d-gpt", "fsl,imx6dl-gpt"; |
487 | 487 | reg = <0x30300000 0x10000>;
|
488 | 488 | interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
|
489 | 489 | clocks = <&clks IMX7D_GPT4_ROOT_CLK>,
|
|
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