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Lakshmi-SowjanyaKAGA-KOKO
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x86/tsc: Provide ART base clock information for TSC
The core code provides a new mechanism to allow conversion between ART and TSC. This allows to replace the x86 specific ART/TSC conversion functions. Prepare for removal by filling in the base clock conversion information for ART and associating the base clock to the TSC clocksource. The existing conversion functions will be removed once the usage sites are converted over to the new model. [ tglx: Massaged change log ] Co-developed-by: Thomas Gleixner <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Co-developed-by: Christopher S. Hall <[email protected]> Signed-off-by: Christopher S. Hall <[email protected]> Signed-off-by: Lakshmi Sowjanya D <[email protected]> Signed-off-by: Thomas Gleixner <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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+25
-18
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+25
-18
lines changed

arch/x86/kernel/tsc.c

Lines changed: 24 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -50,9 +50,9 @@ int tsc_clocksource_reliable;
5050

5151
static int __read_mostly tsc_force_recalibrate;
5252

53-
static u32 art_to_tsc_numerator;
54-
static u32 art_to_tsc_denominator;
55-
static u64 art_to_tsc_offset;
53+
static struct clocksource_base art_base_clk = {
54+
.id = CSID_X86_ART,
55+
};
5656
static bool have_art;
5757

5858
struct cyc2ns {
@@ -1074,7 +1074,7 @@ core_initcall(cpufreq_register_tsc_scaling);
10741074
*/
10751075
static void __init detect_art(void)
10761076
{
1077-
unsigned int unused[2];
1077+
unsigned int unused;
10781078

10791079
if (boot_cpu_data.cpuid_level < ART_CPUID_LEAF)
10801080
return;
@@ -1089,13 +1089,14 @@ static void __init detect_art(void)
10891089
tsc_async_resets)
10901090
return;
10911091

1092-
cpuid(ART_CPUID_LEAF, &art_to_tsc_denominator,
1093-
&art_to_tsc_numerator, unused, unused+1);
1092+
cpuid(ART_CPUID_LEAF, &art_base_clk.denominator,
1093+
&art_base_clk.numerator, &art_base_clk.freq_khz, &unused);
10941094

1095-
if (art_to_tsc_denominator < ART_MIN_DENOMINATOR)
1095+
art_base_clk.freq_khz /= KHZ;
1096+
if (art_base_clk.denominator < ART_MIN_DENOMINATOR)
10961097
return;
10971098

1098-
rdmsrl(MSR_IA32_TSC_ADJUST, art_to_tsc_offset);
1099+
rdmsrl(MSR_IA32_TSC_ADJUST, art_base_clk.offset);
10991100

11001101
/* Make this sticky over multiple CPU init calls */
11011102
setup_force_cpu_cap(X86_FEATURE_ART);
@@ -1303,13 +1304,13 @@ struct system_counterval_t convert_art_to_tsc(u64 art)
13031304
{
13041305
u64 tmp, res, rem;
13051306

1306-
rem = do_div(art, art_to_tsc_denominator);
1307+
rem = do_div(art, art_base_clk.denominator);
13071308

1308-
res = art * art_to_tsc_numerator;
1309-
tmp = rem * art_to_tsc_numerator;
1309+
res = art * art_base_clk.numerator;
1310+
tmp = rem * art_base_clk.numerator;
13101311

1311-
do_div(tmp, art_to_tsc_denominator);
1312-
res += tmp + art_to_tsc_offset;
1312+
do_div(tmp, art_base_clk.denominator);
1313+
res += tmp + art_base_clk.offset;
13131314

13141315
return (struct system_counterval_t) {
13151316
.cs_id = have_art ? CSID_X86_TSC : CSID_GENERIC,
@@ -1356,7 +1357,6 @@ struct system_counterval_t convert_art_ns_to_tsc(u64 art_ns)
13561357
}
13571358
EXPORT_SYMBOL(convert_art_ns_to_tsc);
13581359

1359-
13601360
static void tsc_refine_calibration_work(struct work_struct *work);
13611361
static DECLARE_DELAYED_WORK(tsc_irqwork, tsc_refine_calibration_work);
13621362
/**
@@ -1458,8 +1458,10 @@ static void tsc_refine_calibration_work(struct work_struct *work)
14581458
if (tsc_unstable)
14591459
goto unreg;
14601460

1461-
if (boot_cpu_has(X86_FEATURE_ART))
1461+
if (boot_cpu_has(X86_FEATURE_ART)) {
14621462
have_art = true;
1463+
clocksource_tsc.base = &art_base_clk;
1464+
}
14631465
clocksource_register_khz(&clocksource_tsc, tsc_khz);
14641466
unreg:
14651467
clocksource_unregister(&clocksource_tsc_early);
@@ -1484,8 +1486,10 @@ static int __init init_tsc_clocksource(void)
14841486
* the refined calibration and directly register it as a clocksource.
14851487
*/
14861488
if (boot_cpu_has(X86_FEATURE_TSC_KNOWN_FREQ)) {
1487-
if (boot_cpu_has(X86_FEATURE_ART))
1489+
if (boot_cpu_has(X86_FEATURE_ART)) {
14881490
have_art = true;
1491+
clocksource_tsc.base = &art_base_clk;
1492+
}
14891493
clocksource_register_khz(&clocksource_tsc, tsc_khz);
14901494
clocksource_unregister(&clocksource_tsc_early);
14911495

@@ -1509,10 +1513,12 @@ static bool __init determine_cpu_tsc_frequencies(bool early)
15091513

15101514
if (early) {
15111515
cpu_khz = x86_platform.calibrate_cpu();
1512-
if (tsc_early_khz)
1516+
if (tsc_early_khz) {
15131517
tsc_khz = tsc_early_khz;
1514-
else
1518+
} else {
15151519
tsc_khz = x86_platform.calibrate_tsc();
1520+
clocksource_tsc.freq_khz = tsc_khz;
1521+
}
15161522
} else {
15171523
/* We should not be here with non-native cpu calibration */
15181524
WARN_ON(x86_platform.calibrate_cpu != native_calibrate_cpu);

include/linux/clocksource_ids.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -9,6 +9,7 @@ enum clocksource_ids {
99
CSID_X86_TSC_EARLY,
1010
CSID_X86_TSC,
1111
CSID_X86_KVM_CLK,
12+
CSID_X86_ART,
1213
CSID_MAX,
1314
};
1415

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