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Merge tag 'soc-fixes-6.7-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Arnd Bergmann: "A couple of platforms have some last-minute fixes, in particular: - riscv gets some fixes for noncoherent DMA on the renesas and thead platforms and dts fix for SPI on the visionfive 2 board - Qualcomm Snapdragon gets three dts fixes to address board specific regressions on the pmic and gpio nodes - Rockchip platforms get multiple dts fixes to address issues on the recent rk3399 platform as well as the older rk3128 platform that apparently regressed a while ago. - TI OMAP gets some trivial code and dts fixes and a regression fix for the omap1 ams-delta modem - NXP i.MX firmware has one fix for a use-after-free but in its error handling" * tag 'soc-fixes-6.7-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) soc: renesas: ARCH_R9A07G043 depends on !RISCV_ISA_ZICBOM riscv: only select DMA_DIRECT_REMAP from RISCV_ISA_ZICBOM and ERRATA_THEAD_PBMT riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT riscv: dts: thead: set dma-noncoherent to soc bus arm64: dts: rockchip: Fix i2s0 pin conflict on ROCK Pi 4 boards arm64: dts: rockchip: Add i2s0-2ch-bus-bclk-off pins to RK3399 clk: ti: Fix missing omap5 mcbsp functional clock and aliases clk: ti: Fix missing omap4 mcbsp functional clock and aliases ARM: OMAP1: ams-delta: Fix MODEM initialization failure soc: renesas: Make ARCH_R9A07G043 depend on required options riscv: dts: starfive: visionfive 2: correct spi's ss pin firmware/imx-dsp: Fix use_after_free in imx_dsp_setup_channels() ARM: OMAP: timer32K: fix all kernel-doc warnings ARM: omap2: fix a debug printk ARM: dts: rockchip: Fix timer clocks for RK3128 ARM: dts: rockchip: Add missing quirk for RK3128's dma engine ARM: dts: rockchip: Add missing arm timer interrupt for RK3128 ARM: dts: rockchip: Fix i2c0 register address for RK3128 arm64: dts: rockchip: set codec system-clock-fixed on px30-ringneck-haikou arm64: dts: rockchip: use codec as clock master on px30-ringneck-haikou ...
2 parents c17cda1 + 736a4aa commit 3a568e3

24 files changed

+128
-120
lines changed

‎MAINTAINERS

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -13846,9 +13846,10 @@ F: Documentation/devicetree/bindings/media/amlogic,gx-vdec.yaml
1384613846
F: drivers/staging/media/meson/vdec/
1384713847

1384813848
METHODE UDPU SUPPORT
13849-
M: Vladimir Vid <vladimir.vid@sartura.hr>
13849+
M: Robert Marko <robert.marko@sartura.hr>
1385013850
S: Maintained
13851-
F: arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts
13851+
F: arch/arm64/boot/dts/marvell/armada-3720-eDPU.dts
13852+
F: arch/arm64/boot/dts/marvell/armada-3720-uDPU.*
1385213853

1385313854
MHI BUS
1385413855
M: Manivannan Sadhasivam <[email protected]>

‎arch/arm/boot/dts/rockchip/rk3128.dtsi

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,8 @@
6464
compatible = "arm,armv7-timer";
6565
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
6666
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
67-
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
67+
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>,
68+
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
6869
arm,cpu-registers-not-fw-configured;
6970
clock-frequency = <24000000>;
7071
};
@@ -233,47 +234,47 @@
233234
compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
234235
reg = <0x20044000 0x20>;
235236
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
236-
clocks = <&cru PCLK_TIMER>, <&xin24m>;
237+
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER0>;
237238
clock-names = "pclk", "timer";
238239
};
239240

240241
timer1: timer@20044020 {
241242
compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
242243
reg = <0x20044020 0x20>;
243244
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
244-
clocks = <&cru PCLK_TIMER>, <&xin24m>;
245+
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER1>;
245246
clock-names = "pclk", "timer";
246247
};
247248

248249
timer2: timer@20044040 {
249250
compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
250251
reg = <0x20044040 0x20>;
251252
interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
252-
clocks = <&cru PCLK_TIMER>, <&xin24m>;
253+
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER2>;
253254
clock-names = "pclk", "timer";
254255
};
255256

256257
timer3: timer@20044060 {
257258
compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
258259
reg = <0x20044060 0x20>;
259260
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
260-
clocks = <&cru PCLK_TIMER>, <&xin24m>;
261+
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER3>;
261262
clock-names = "pclk", "timer";
262263
};
263264

264265
timer4: timer@20044080 {
265266
compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
266267
reg = <0x20044080 0x20>;
267268
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
268-
clocks = <&cru PCLK_TIMER>, <&xin24m>;
269+
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER4>;
269270
clock-names = "pclk", "timer";
270271
};
271272

272273
timer5: timer@200440a0 {
273274
compatible = "rockchip,rk3128-timer", "rockchip,rk3288-timer";
274275
reg = <0x200440a0 0x20>;
275276
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
276-
clocks = <&cru PCLK_TIMER>, <&xin24m>;
277+
clocks = <&cru PCLK_TIMER>, <&cru SCLK_TIMER5>;
277278
clock-names = "pclk", "timer";
278279
};
279280

@@ -426,7 +427,7 @@
426427

427428
i2c0: i2c@20072000 {
428429
compatible = "rockchip,rk3128-i2c", "rockchip,rk3288-i2c";
429-
reg = <20072000 0x1000>;
430+
reg = <0x20072000 0x1000>;
430431
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
431432
clock-names = "i2c";
432433
clocks = <&cru PCLK_I2C0>;
@@ -458,6 +459,7 @@
458459
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
459460
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
460461
arm,pl330-broken-no-flushp;
462+
arm,pl330-periph-burst;
461463
clocks = <&cru ACLK_DMAC>;
462464
clock-names = "apb_pclk";
463465
#dma-cells = <1>;

‎arch/arm/boot/dts/ti/omap/omap4-l4-abe.dtsi

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -109,6 +109,8 @@
109109
reg = <0x0 0xff>, /* MPU private access */
110110
<0x49022000 0xff>; /* L3 Interconnect */
111111
reg-names = "mpu", "dma";
112+
clocks = <&abe_clkctrl OMAP4_MCBSP1_CLKCTRL 24>;
113+
clock-names = "fck";
112114
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
113115
interrupt-names = "common";
114116
ti,buffer-size = <128>;
@@ -142,6 +144,8 @@
142144
reg = <0x0 0xff>, /* MPU private access */
143145
<0x49024000 0xff>; /* L3 Interconnect */
144146
reg-names = "mpu", "dma";
147+
clocks = <&abe_clkctrl OMAP4_MCBSP2_CLKCTRL 24>;
148+
clock-names = "fck";
145149
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
146150
interrupt-names = "common";
147151
ti,buffer-size = <128>;
@@ -175,6 +179,8 @@
175179
reg = <0x0 0xff>, /* MPU private access */
176180
<0x49026000 0xff>; /* L3 Interconnect */
177181
reg-names = "mpu", "dma";
182+
clocks = <&abe_clkctrl OMAP4_MCBSP3_CLKCTRL 24>;
183+
clock-names = "fck";
178184
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
179185
interrupt-names = "common";
180186
ti,buffer-size = <128>;

‎arch/arm/boot/dts/ti/omap/omap4-l4.dtsi

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2043,6 +2043,8 @@
20432043
compatible = "ti,omap4-mcbsp";
20442044
reg = <0x0 0xff>; /* L4 Interconnect */
20452045
reg-names = "mpu";
2046+
clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 24>;
2047+
clock-names = "fck";
20462048
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
20472049
interrupt-names = "common";
20482050
ti,buffer-size = <128>;

‎arch/arm/boot/dts/ti/omap/omap5-l4-abe.dtsi

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -109,6 +109,8 @@
109109
reg = <0x0 0xff>, /* MPU private access */
110110
<0x49022000 0xff>; /* L3 Interconnect */
111111
reg-names = "mpu", "dma";
112+
clocks = <&abe_clkctrl OMAP5_MCBSP1_CLKCTRL 24>;
113+
clock-names = "fck";
112114
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
113115
interrupt-names = "common";
114116
ti,buffer-size = <128>;
@@ -142,6 +144,8 @@
142144
reg = <0x0 0xff>, /* MPU private access */
143145
<0x49024000 0xff>; /* L3 Interconnect */
144146
reg-names = "mpu", "dma";
147+
clocks = <&abe_clkctrl OMAP5_MCBSP2_CLKCTRL 24>;
148+
clock-names = "fck";
145149
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
146150
interrupt-names = "common";
147151
ti,buffer-size = <128>;
@@ -175,6 +179,8 @@
175179
reg = <0x0 0xff>, /* MPU private access */
176180
<0x49026000 0xff>; /* L3 Interconnect */
177181
reg-names = "mpu", "dma";
182+
clocks = <&abe_clkctrl OMAP5_MCBSP3_CLKCTRL 24>;
183+
clock-names = "fck";
178184
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
179185
interrupt-names = "common";
180186
ti,buffer-size = <128>;

‎arch/arm/mach-omap1/board-ams-delta.c

Lines changed: 16 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -550,6 +550,7 @@ static struct platform_device *ams_delta_devices[] __initdata = {
550550
&ams_delta_nand_device,
551551
&ams_delta_lcd_device,
552552
&cx20442_codec_device,
553+
&modem_nreset_device,
553554
};
554555

555556
static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = {
@@ -782,26 +783,28 @@ static struct plat_serial8250_port ams_delta_modem_ports[] = {
782783
{ },
783784
};
784785

786+
static int ams_delta_modem_pm_activate(struct device *dev)
787+
{
788+
modem_priv.regulator = regulator_get(dev, "RESET#");
789+
if (IS_ERR(modem_priv.regulator))
790+
return -EPROBE_DEFER;
791+
792+
return 0;
793+
}
794+
795+
static struct dev_pm_domain ams_delta_modem_pm_domain = {
796+
.activate = ams_delta_modem_pm_activate,
797+
};
798+
785799
static struct platform_device ams_delta_modem_device = {
786800
.name = "serial8250",
787801
.id = PLAT8250_DEV_PLATFORM1,
788802
.dev = {
789803
.platform_data = ams_delta_modem_ports,
804+
.pm_domain = &ams_delta_modem_pm_domain,
790805
},
791806
};
792807

793-
static int __init modem_nreset_init(void)
794-
{
795-
int err;
796-
797-
err = platform_device_register(&modem_nreset_device);
798-
if (err)
799-
pr_err("Couldn't register the modem regulator device\n");
800-
801-
return err;
802-
}
803-
804-
805808
/*
806809
* This function expects MODEM IRQ number already assigned to the port.
807810
* The MODEM device requires its RESET# pin kept high during probe.
@@ -833,37 +836,6 @@ static int __init ams_delta_modem_init(void)
833836
}
834837
arch_initcall_sync(ams_delta_modem_init);
835838

836-
static int __init late_init(void)
837-
{
838-
int err;
839-
840-
err = modem_nreset_init();
841-
if (err)
842-
return err;
843-
844-
/*
845-
* Once the modem device is registered, the modem_nreset
846-
* regulator can be requested on behalf of that device.
847-
*/
848-
modem_priv.regulator = regulator_get(&ams_delta_modem_device.dev,
849-
"RESET#");
850-
if (IS_ERR(modem_priv.regulator)) {
851-
err = PTR_ERR(modem_priv.regulator);
852-
goto unregister;
853-
}
854-
return 0;
855-
856-
unregister:
857-
platform_device_unregister(&ams_delta_modem_device);
858-
return err;
859-
}
860-
861-
static void __init ams_delta_init_late(void)
862-
{
863-
omap1_init_late();
864-
late_init();
865-
}
866-
867839
static void __init ams_delta_map_io(void)
868840
{
869841
omap1_map_io();
@@ -877,7 +849,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
877849
.init_early = omap1_init_early,
878850
.init_irq = omap1_init_irq,
879851
.init_machine = ams_delta_init,
880-
.init_late = ams_delta_init_late,
852+
.init_late = omap1_init_late,
881853
.init_time = omap1_timer_init,
882854
.restart = omap1_restart,
883855
MACHINE_END

‎arch/arm/mach-omap1/timer32k.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -176,17 +176,18 @@ static u64 notrace omap_32k_read_sched_clock(void)
176176
return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
177177
}
178178

179+
static struct timespec64 persistent_ts;
180+
static cycles_t cycles;
181+
static unsigned int persistent_mult, persistent_shift;
182+
179183
/**
180184
* omap_read_persistent_clock64 - Return time from a persistent clock.
185+
* @ts: &struct timespec64 for the returned time
181186
*
182187
* Reads the time from a source which isn't disabled during PM, the
183188
* 32k sync timer. Convert the cycles elapsed since last read into
184189
* nsecs and adds to a monotonically increasing timespec64.
185190
*/
186-
static struct timespec64 persistent_ts;
187-
static cycles_t cycles;
188-
static unsigned int persistent_mult, persistent_shift;
189-
190191
static void omap_read_persistent_clock64(struct timespec64 *ts)
191192
{
192193
unsigned long long nsecs;
@@ -206,10 +207,9 @@ static void omap_read_persistent_clock64(struct timespec64 *ts)
206207
/**
207208
* omap_init_clocksource_32k - setup and register counter 32k as a
208209
* kernel clocksource
209-
* @pbase: base addr of counter_32k module
210-
* @size: size of counter_32k to map
210+
* @vbase: base addr of counter_32k module
211211
*
212-
* Returns 0 upon success or negative error code upon failure.
212+
* Returns: %0 upon success or negative error code upon failure.
213213
*
214214
*/
215215
static int __init omap_init_clocksource_32k(void __iomem *vbase)

‎arch/arm/mach-omap2/omap_hwmod.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2209,7 +2209,7 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
22092209
return err;
22102210

22112211
pr_debug("omap_hwmod: %s %pOFn at %pR\n",
2212-
oh->name, np, &res);
2212+
oh->name, np, res);
22132213

22142214
if (oh && oh->mpu_rt_idx) {
22152215
omap_hwmod_fix_mpu_rt_idx(oh, np, res);

‎arch/arm64/boot/dts/qcom/apq8096-db820c.dts

Lines changed: 15 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -62,25 +62,23 @@
6262
stdout-path = "serial0:115200n8";
6363
};
6464

65-
clocks {
66-
divclk4: divclk4 {
67-
compatible = "fixed-clock";
68-
#clock-cells = <0>;
69-
clock-frequency = <32768>;
70-
clock-output-names = "divclk4";
65+
div1_mclk: divclk1 {
66+
compatible = "gpio-gate-clock";
67+
pinctrl-0 = <&audio_mclk>;
68+
pinctrl-names = "default";
69+
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
70+
#clock-cells = <0>;
71+
enable-gpios = <&pm8994_gpios 15 0>;
72+
};
7173

72-
pinctrl-names = "default";
73-
pinctrl-0 = <&divclk4_pin_a>;
74-
};
74+
divclk4: divclk4 {
75+
compatible = "fixed-clock";
76+
#clock-cells = <0>;
77+
clock-frequency = <32768>;
78+
clock-output-names = "divclk4";
7579

76-
div1_mclk: divclk1 {
77-
compatible = "gpio-gate-clock";
78-
pinctrl-0 = <&audio_mclk>;
79-
pinctrl-names = "default";
80-
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
81-
#clock-cells = <0>;
82-
enable-gpios = <&pm8994_gpios 15 0>;
83-
};
80+
pinctrl-names = "default";
81+
pinctrl-0 = <&divclk4_pin_a>;
8482
};
8583

8684
gpio-keys {

‎arch/arm64/boot/dts/qcom/msm8996-xiaomi-common.dtsi

Lines changed: 15 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -11,26 +11,24 @@
1111
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
1212

1313
/ {
14-
clocks {
15-
divclk1_cdc: divclk1 {
16-
compatible = "gpio-gate-clock";
17-
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
18-
#clock-cells = <0>;
19-
enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
14+
divclk1_cdc: divclk1 {
15+
compatible = "gpio-gate-clock";
16+
clocks = <&rpmcc RPM_SMD_DIV_CLK1>;
17+
#clock-cells = <0>;
18+
enable-gpios = <&pm8994_gpios 15 GPIO_ACTIVE_HIGH>;
2019

21-
pinctrl-names = "default";
22-
pinctrl-0 = <&divclk1_default>;
23-
};
20+
pinctrl-names = "default";
21+
pinctrl-0 = <&divclk1_default>;
22+
};
2423

25-
divclk4: divclk4 {
26-
compatible = "fixed-clock";
27-
#clock-cells = <0>;
28-
clock-frequency = <32768>;
29-
clock-output-names = "divclk4";
24+
divclk4: divclk4 {
25+
compatible = "fixed-clock";
26+
#clock-cells = <0>;
27+
clock-frequency = <32768>;
28+
clock-output-names = "divclk4";
3029

31-
pinctrl-names = "default";
32-
pinctrl-0 = <&divclk4_pin_a>;
33-
};
30+
pinctrl-names = "default";
31+
pinctrl-0 = <&divclk4_pin_a>;
3432
};
3533

3634
gpio-keys {

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